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Fairchild Semiconductor - N-Channel Logic Level Enhancement Mode Field Effect Transistor

Numéro de référence FDB4030L
Description N-Channel Logic Level Enhancement Mode Field Effect Transistor
Fabricant Fairchild Semiconductor 
Logo Fairchild Semiconductor 





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FDB4030L fiche technique
March 1998
FDP4030L / FDB4030L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high
density process has been especially tailored to minimize
on-state resistance and provide superior switching
performance. These devices are particularly suited for
low voltage applications such as DC/DC converters and
other battery powered circuits where fast switching, low
in-line power loss, and resistance to transients are
needed.
20
A,
30
V.
RDS(ON) = 0.035
RDS(ON) = 0.055
@
VGS=10 V
@ VGS=4.5V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the
need for an external Zener diode transient suppressor.
High density cell design for extremely low RDS(ON).
175°C maximum junction temperature rating.
_______________________________________________________________________________
D
G
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol Parameter
FDP4030L
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous (Note 1)
- Pulsed
(Note 1)
PD Total Power Dissipation @ TC = 25°C
Derate above 25°C
TJ,TSTG Operating and Storage Temperature Range
TL Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
THERMAL CHARACTERISTICS
RθJC Thermal Resistance, Junction-to-Case
RθJA Thermal Resistance, Junction-to-Ambient
30
±20
20
60
37.5
0.25
-65 to 175
275
FDB4030L
4
62.5
Units
V
V
A
W
W/°C
°C
°C
°C/W
°C/W
© 1998 Fairchild Semiconductor Corporation
FDP4030L Rev.B1

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