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PDF NJU7291 Data sheet ( Hoja de datos )

Número de pieza NJU7291
Descripción SYSTEM RESET IC
Fabricantes New Japan Radio 
Logotipo New Japan Radio Logotipo



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NJU7291
SYSTEM RESET IC WITH WATCHDOG TIMER
GENERAL DESCRIPTION
PACKAGE OUTLINE
The NJU7291 is a system reset IC with watchdog timer. It
can detect an instantaneous voltage drop and break, and
generates a reset signal. The NJU7291 provides a fail-safe
function with an internal watchdog timer on various
microcomputer systems. It is available in 8-lead DIP and
MSOP (TVSP) packages.
NJU7291RB1
(MSOP8 (TVSP8))
NJU7291D
(DIP8)
FEATURES
Supply Voltage Range
: V+ = 2.5 V to 7.0 V
RESET Detection Voltage : VRL = ± 1.0 % and Adjustable Detection Voltage with External Resistance
Rising RESET Hold Time and Watchdog Timer RESET Time Setting Ratio = 30 : 1
Configurable Watchdog Timer Watching Time Independent Setting
Configurable Stopping Watchdog Timer Function
Package Outline
: MSOP8 (TVSP8)*, DIP8
*MEET JEDEC MO-187-DA / THIN TYPE
PIN CONFIGRATION / PIN FUNCTION
PIN No. PIN NAME
FUNCTION
1. CR External Capacitor Pin for Setting Reset Pin
1 8 2. CW External Capacitor Pin for Clock Pin
2 7 3. CK Clock Input Pin
3
6
4. GND Ground Pin
5. V+ Power Supply Pin
4 5 6. WDEN External Register Pin for Setting Watchdog Timer Pin
7. RSADJ External Register Pin for Setting Reset Pin
8. RESET Reset Signal Output Pin
BLOCK DIAGRAM
RSADJ 7
RD1
RD2
RD3
V+
5
REG
VREF
CR
Control
V+
CK 3
100k
4
GND
CW
Control
100k
6
WDEN
Ver.2013-08-28
8 RESET
V+
1 CR
V+ CR
CW
2
CW
-1-

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NJU7291 pdf
NJU7291
WDT Monitor Period
The standby condition of the clock CK falling edge detection
The CW is charged by charge current: ICW. It becomes possible to detect the clock CK falling edge with greater than
equal to the CW Pin threshold voltage VTCWL (typ. 0.205V).
In the case of clock CK falling edge detection
When it detects the clock CK falling edge, it changes to discharging mode by ICWL (typ. 36µA) from charging mode by ICW,
and the CW Pin voltage: VCW falls. Then, when the CW Pin voltage: VCW reaches the threshold voltage: VTCWL, it
changes to charging mode by ICW, and the CW Pin voltage: VCW rises.
In the case of clock CK falling edge undetection
In this condition, the WDT Reset Time: TWD is the time that the CW Pin voltage reaches to the threshold voltage VTCWH
from the threshold voltage VTCWL.
WDT Reset Period
Until the CR Pin Voltage: VCR exceeds “Timer Reset Release Threshold Voltage”: VTCRW (typ. 0.5V).
Until this condition, the reset signal is kept RESET =”L”. The period keeping RESET =”L” becomes WDT Reset Time:
TWR.
Detection of Reset Voltage
In the case of Supply Voltage: V+ < Reset Voltage: VRL
At the watchdog timer monitoring period and the watchdog timer reset period, the reset signal outputs RESET =”L” at
this condition. The CR Pin and CW Pin become VCR=0V and VCW=0V to discharge the CR and CW. The CR Pin and CW
Pin become VCR=0V and VCW=0V in order to discharge the CR and CW.
Then the operating condition returns to the state of .
Stop of WDT Function
In the case of WDT Timer Setting Pin: WDEN=”H”
Setting to WDEN=”H”, WDT Monitor operation is stopped. At this time, the CW is discharged and VCW becomes 0(zero)
V. If Power Supply: V+ is greater than Reset Voltage: VRL, RESET is kept “H” level. Setting to WDEN=”L” or OPEN,
the CW charge operation starts and returns WDT Monitor operation.
Also, when it is set the WDEN=”H” in the WDT Reset period, the WDT Monitor operation stops after the elapse of the
WDT Reset Time.
When you want to not use WDT, the Pin(s) handling is the following. WDEN=”H”, CK Pin =GND or OPEN and CW Pin
=OPEN.
Ver.2013-08-28
-5-

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