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TC74HC279AF fiches techniques PDF

Toshiba - CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC

Numéro de référence TC74HC279AF
Description CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
Fabricant Toshiba 
Logo Toshiba 





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TC74HC279AF fiche technique
TC74HC279AP/AF
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC279AP, TC74HC279AF
Quad S -R Latch
The TC74HC279A is a high speed CMOS QUAD S-R LATCH
fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
Each latch has an independent Q output and Set and Reset
inputs. S and R are active low. When S input is low, the Q
output goes high and when R input is low, the Q output goes
low. When both S and R are low, S takes precedence
resulting Q = low. When both of S and R are held high, Q
output doesn’t change.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
High speed: tpd = 12 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 2 μA (max) at Ta = 25°C
High noise immunity: VNIH = VNIL = 28% VCC (min)
Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
Balanced propagation delays: tpLH ∼− tpHL
Wide operating voltage range: VCC (opr) = 2 to 6 V
Pin and function compatible with 74LS279
Pin Assignment
TC74HC279AP
TC74HC279AF
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
: 1.00 g (typ.)
: 0.18 g (typ.)
Start of commercial production
1988-05
1 2014-03-01

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