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PDF RT2530Q Data sheet ( Hoja de datos )
| Número de pieza | RT2530Q | |
| Descripción | DDR Termination Regulator | |
| Fabricantes | Richtek Technology | |
| Logotipo |  |
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®
RT2530Q
DDR Termination Regulator
General Description
The RT2530Q is a 2A sink/source tracking termination
regulator. It is specifically designed for low-cost and low-
external component count systems. The RT2530Q
possesses a high speed operating amplifier that provides
fast load transient response and only requires 20μF of
ceramic output capacitance. The RT2530Q supports
remote sensing functions and all features required to power
the DDRII/DDRIII VTT bus termination according to the
JEDEC specification. In addition, the RT2530Q includes
integrated sleep-state controls placing VTT in High-Z in
S3 (suspend to RAM) The RT2530Q is available in the
thermal efficient package SOP-8 (Exposed Pad).
Ordering Information
RT2530Q
Package Type
SP : SOP-8 (Exposed Pad-Option 1)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
RT2530QGSP : Product Number
RT2530Q
GSPYMDNN
YMDNN : Date Code
Features
Supports DDRII and DDRIII, Low-Power
Requirement
Source/Sink 2A for DDRII and DDRIII
Input Voltage Range : 3.1V to 3.6V
VLDOIN Voltage Range : 1.2V to 1.8V
Requires Only 20μF Ceramic Output Capacitance
Supports High-Z in S3
Integrated Divider Tracks 1/2 VDDQSNS for Both VTT
and VTTREF
Remote Sensing (VTTSNS)
±20mV Accuracy for VTT
10mA Buffered Reference (Sourcing/Sinking)
(VTTREF)
Built-In Soft-Start
Current Limit
Thermal Shutdown
RoHS Compliant and Halogen Free
Applications
DDRII, DDRIII Memory Termination
SSTL-2, SSTL-18, HSTL Termination
Pin Configurations
(TOP VIEW)
GND
S3
VTTSNS
VTTREF
8
27
3
GND
96
45
VTT
VLDOIN
VIN
VDDQSNS
SOP-8 (Exposed Pad)
Simplified Application Circuit
VLDOIN
3.3V
C1
C2
RT2530Q
VLDOIN
VTTREF
VTTREF
VDDQSNS
C3
VTTSNS
VIN
VTT
VTT
C4
GND S3 S3
Copyright ©2016 Richtek Technology Corporation. All rights reserved.
DS2530Q-00 April 2016
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1
1 page  
RT2530Q
Parameter
UVLO Threshold Voltage
S3 Input
Voltage
Logic-High
Logic-Low
S3 Input Leakage Current
Thermal Shutdown
Protection
Thermal Shutdown
Hysteresis
Symbol
VUVLO
VIH
VIL
IILK
Rising
Falling
Test Conditions
TSD
TSD
Min Typ Max Unit
-- --
1.4 --
2.7
V
2.4
1.6 --
-- --
--
V
0.4
-- --
1 A
-- 160 -- C
-- 20
-- C
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright ©2016 Richtek Technology Corporation. All rights reserved.
DS2530Q-00 April 2016
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
5
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| PDF Descargar | [ Datasheet RT2530Q.PDF ] | |
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