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PDF PT7M7433 Data sheet ( Hoja de datos )

Número de pieza PT7M7433
Descripción uP Supervisory Circuit
Fabricantes Pericom Technology 
Logotipo Pericom Technology Logotipo



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No Preview Available ! PT7M7433 Hoja de datos, Descripción, Manual

PT7M7433/34/35
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P Supervisory Circuit
Features
Description
User-Adjustable Low/High Thresholds with 615mV
The PT7M7433/34/35 are single-level battery monitors
Internal Reference
Low Current (1.5μA typ) SOT23-3
Single Low-Battery Outputs
with internal hysteresis. These devices are offered with
PT7M7427xx single low-battery output indicators which can be used
PT7M7428xx to indicate three bPaTtt7eMry74c29oxnxditions: good (operate
Push-Pull LBO, Open-Drain LBO and 1OpLeBnO-Drain system in normal m1odLeB)O, weak (operate system in low-
LBO options
power mode), or empty (disable the system).
90ms Minimum LBO Timeout Period
GND 3The PT7M7433/34/35 are GuNsDer-3adjustable threshold
Immune to Short Battery Voltage Transient2s BATT
-40°C to + 85°C Operating Temperature Range
voltages permitting the user to select the hysteresis
range and conseque2ntlByATtThe sensitivity of the system to
noise. A wide hysteresis range also prevents chattering
Application
SOT23-5
PT7M7430xx that can result due to battery recovery after load
PT7M7431xx removal.
PT7M7432xx
Monitoring lithiumion (Li+) cells or multicell alkaline/
1 GND LBOL 5
1 GND LBOL 5
NiCd/ NiMH power supplies.
2 NC
2 NC
Pin Configuration
3 LBOH BATT 4
3 LBOH BATT 4
PT7M7433
PT7M7434
1 HTHIN VCC 5
PT7M7435
1 HTHIN VCC 5
PT7M7479H
PT7M7479L
1 HTH VDD 5
2 GND
3 LTHIN LBO 4
2 GND
3 LTHIN LBO 4
2 GND
3 LTH
RST
(/RST) 4
Pin Description
Pin Name
SOT23-6
PT7M7436
PT7M7437
Type
PT7M7438
Description
PT7M3806M
PT7M3806E
1
HTHIN
1
I
HTHINHTVHCCTh6reshold Mon1 itoHrTHInINputV.CAC re6sistor-divider1 neRtSwTSoErNkSsEeHtsSEthNeSEhi6gh
threshold associated with LBO/LBO.
2
GND
P2 GND GLrBoOuHnd5
2 GND LBOH 5
2 GND
LSENSE 5
3
LTHIN
I
3
LTH Threshold Monitor Input. A resistor-divider network sets the low
LTHINthrLeBsOhLold4 associated w3ithLLTHBINO/LLBBOOL. 4
3 RESET
VCC 4
Low-Battery Output. LBO /LBO is asserted when LTHIN drops below VLTHIN,
4
LBO/LBO
O and remains asserted for at least 90ms HTHIN rises above VHTHIN. Push-pull
output for PT7M7433. Open drain output for PT7M7434/35.
5
VCC
P Supply Voltage. Device power supply for adjustable threshold versions.
12-07-0002
PT0213-4
07/05/12
1

1 page




PT7M7433 pdf
PT7M7433/34/35
P Supervisory Circuit
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Fig 2. PT7M7433/34/35 adjustable hysteresis
VHTH
VBATT
VLTH
VHYST
tLBCP
LBO
HTH Battery voltage good enable operation
LTH Battery voltage low suspend/disable operation
Application Information
Resistor-Value Selection (Programming the Adjustable Thresholds)
VREF = VLTHIN = VHTHIN = 615mV
VTRIPLOW = VLTH = VREF ( R1 + R2 + R3
R2 + R3
VTRIPHIGH = VHTL = VREF (
R1 + R2 + R3
R3
)
)
RTOTAL = R1 + R2 + R3
Use the following steps to determine values for R1, R2, and R3 of Functional Block Diagram.
1) Choose a value for RTOTAL. Because the PT7M7433/34/35 have very high input impedance, RTOTAL can be up to 5MΩ.
2) Calculate R3 based on RTOTAL and the desired upper trip point:
×R3 =
VREF RTOTAL
VTRIPHIGH
= 615mV ×RTOTAL
VTRIPHIGH
3) Calculate R2 based on RTOTAL, R3, and the desired lower trip point:
R2
=
615mV ×RTOTAL
VTRIPLOW
- R3
4) Calculate R1 based on RTOTAL, R3, and R2:
R1 = RTOTAL R2 R3
12-07-0002
PT0213-4
07/05/12
5

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