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PDF IDT74FCT377A Data sheet ( Hoja de datos )
| Número de pieza | IDT74FCT377A | |
| Descripción | FAST CMOS OCTAL D FLIP-FLOP | |
| Fabricantes | Integrated Device Tech | |
| Logotipo |  |
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®
Integrated Device Technology, Inc.
FAST CMOS
OCTAL D FLIP-FLOP
WITH CLOCK ENABLE
IDT54/74FCT377
IDT54/74FCT377A
IDT54/74FCT377C
FEATURES:
• IDT54/74FCT377 equivalent to FAST™ speed
• IDT54/74FCT377A 25% faster than FAST
• IDT54/74FCT377C 40% faster than FAST
• Equivalent to FAST output drive over full temperature
and voltage supply extremes
• IOL = 48mA (commercial) and 32mA (military)
• IIH and IIL only 5µA max.
• CMOS power levels (1mW typ. static)
• CMOS output level compatible
• Meets or exceeds JEDEC Standard 18 specifications
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT54/74FCT377/A/C is an octal D flip-flop built using
an advanced dual metal CMOS technology. The IDT54/
74FCT377/A/C have eight edge-triggered, D-type flip-flops
with individual D inputs and O outputs. The common buffered
Clock (CP) input loads all flip-flops simultaneously when the
Clock Enable (CE) is LOW. The register is fully edge-
triggered. The state of each D input, one set-up time before
the LOW-to-HIGH clock transition, is transferred to the corre-
sponding flip-flop’s O output. The CE input must be stable only
one set-up time prior to the LOW-to-HIGH clock transition for
predictable operation.
FUNCTIONAL BLOCK DIAGRAM
D0 D1 D2 D3 D4 D5 D6 D7
CE
DQ
CP
DQ
CP
CP
O0
PIN CONFIGURATIONS
O1
DQ
CP
O2
DQ
CP
O3
CE
O0
D0
D1
O1
O2
D2
D3
O3
GND
1 20
2 19
3 18
4 P20-1 17
5
D20-1
SO20-2
16
6 & 15
7 E20-1 14
8 13
9 12
10 11
Vcc
O7
D7
D6
O6
O5
D5
D4
O4
CP
DIP/SOIC/CERPACK
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1992 Integrated Device Technology, Inc.
7.14
DQ
CP
DQ
CP
DQ
CP
DQ
CP
O4 O5 O6 O7
2535 drw 02
INDEX
32
20 19
D1 4
1 18 D7
O1 5
17 D6
O2 6 L20-2 16 O6
D2 7
15 O5
D3 8
14 D5
9 10 11 12 13
2535 drw 01
LCC
TOP VIEW
MAY 1992
DSC4606/2
1
1 page  
IDT54/74FCT377/A/C
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT54/74FCT377
IDT54/74FCT377A
IDT54/74FCT377C
Symbol
Parameter
Com’l.
Mil.
Com’l. Mil. Com’l. Mil.
Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
tPLH Propagation Delay CL = 50pF 2.0 13.0 2.0 15.0 2.0 7.2 2.0 8.3 2.0
tPHL CP to On
RL = 500Ω
tSU Set-up Time
HIGH or LOW
Dn to CP
2.5 — 3.0 — 2.0 — 2.0 — 2.0
tH Hold Time
HIGH or LOW
Dn to CP
2.0 — 2.5 — 1.5 — 1.5 — 1.5
tSU Set-up Time
HIGH or LOW
CE to CP
4.0 — 4.0 — 3.5 — 3.5 — 3.5
tH Hold Time
HIGH or LOW
CE to CP
1.5 — 1.5 — 1.5 — 1.5 — 1.5
tW Clock Pulse Width,
HIGH or LOW
7.0 — 7.0 — 6.0 — 7.0 — 6.0
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
5.2 2.0 5.5 ns
— 2.0 — ns
— 1.5 — ns
— 3.5 — ns
— 1.5 — ns
— 7.0 — ns
2535 tbl 07
7.14 5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet IDT74FCT377A.PDF ] | |
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