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PDF PFE3000-12-069RA Data sheet ( Hoja de datos )
| Número de pieza | PFE3000-12-069RA | |
| Descripción | AC/DC power-factor-corrected (PFC) and DC/DC power supply | |
| Fabricantes | Power-One | |
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DATA SHEET
PFE3000-12-069RA
FEATURES
DESCRIPTION
Best-in-class, Platinum efficiency
Wide input voltage range: 90-300 VAC
AC input with power factor correction
DC input voltage range: 192-400 VDC
Hot-plug capable
Parallel operation with active analog current sharing
Full digital controls for improved performance
High density design: 30.5 W/in3
Small form factor: 69 x 42 x 555 mm
I2C communication interface for control, programming and
monitoring with PMBus™ protocol
Overtemperature, output overvoltage and overcurrent
protection
RoHS Compliant
2 Status LEDs: AC OK and DC OK with fault signalling
Safety-approved to IEC/EN 60950-1 and UL/CSA 60950-1
2nd Ed.
The PFE3000-12-069RA is a 3000 Watt AC/DC power-factor-corrected
(PFC) and DC/DC power supply that converts standard AC mains
power or high voltage DC bus voltages into a main output of 12 VDC
for powering intermediate bus architectures (IBA) in high performance
and reliability servers, routers, and network switches. The
PFE3000-12-069RA meets international safety standards and displays
the CE-Mark for the European Low Voltage Directive (LVD).
APPLICATIONS
o HIGH PERFORMANCE SERVERS
o ROUTERS
o SWITCHES
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Trec Recovery Time
tAC V1 Start-up Time from AC
tV1 rise Rise Time
CLoad Capacitive Loading
3) see Figure 20 for linear derating > 45°C
dI1/dt = 1A/μs, recovery within 1% of V1 nom
V1 = 10.8 VDC (see Figure 7)
V1 = 10…90% V1 nom (see Figure 8)
Ta = 25°C
DATA SHEET
0.5 ms
3 sec
2.5 ms
30000
μF
PARAMETER
Standby Output VSB
VSB nom Nominal Output Voltage
VSB set Output Setpoint Accuracy
dVSB tot Total Regulation
PSB nom Nominal Output Power
ISB nom Nominal Output Current
VSB pp Output Ripple Voltage
dVSB Droop
ISB max Current Limitation
dVSBdyn Dynamic Load Regulation
Trec Recovery Time
tAC VSB Start-up Time from AC
tVSB rise Rise Time
CLoad Capacitive Loading
DESCRIPTION / CONDITION
0.5 ∙ISB nom, Tamb = 25°C
Vi min to Vi max, 0 to 100% ISB nom, Ta min to Ta max
VSB = 12 VDC
VSB = 12 VDC
VSB nom, ISB nom, 20 MHz BW (See Section 5.1)
0 - 100 % ISB nom
ΔISB = 50% ISB nom, ISB = 5 … 100% ISB nom,
dIo/dt = 1 A/μs, recovery within 1% of V1 nom
VSB = 90% VSB nom (see Figure 7)
VSB = 10…90% VSB nom (see
Figure 9)
Tamb = 25°C
MIN NOM MAX UNIT
12 VDC
-0.5 +0.5 %VSBnom
-1 +1 %VSBnom
60 W
5 ADC
120 mVpp
200 mV
6 9 ADC
-0.6 0.6 VSBnom
0.5 ms
2 sec
10 ms
3000 μF
5.1 OUTPUT VOLTAGE RIPPLE
The internal output capacitance at the power supply output (behind OR-ing element) is minimized to prevent disturbances
during hot plug. In order to provide low output ripple voltage in the application, external capacitors should be added close to
the power supply output.
The setup of Figure has been used to evaluate suitable capacitor types. The capacitor combinations of Table 1 and Table 2
should be used to reduce the output ripple voltage.
The ripple voltage is measured with 20 MHz BWL, close to the external capacitors.
Figure 6 - Output ripple test setup
L Vout
N
PSU
C Probe
Gnd
Load
Scope
20MHz BW
Note: Care must be taken when using ceramic capacitors with a total capacitance of 1 µF to 50 µF on output V1, due to their
high quality factor the output ripple voltage may be increased in certain frequency ranges due to resonance effects.
Table 1 - Suitable capacitors for V1
External capacitor V1
2Pcs 47µF/16V/X5R/1210
1Pcs 1000µF/16V/Low ESR Aluminum/ø10x20
1Pcs 270µF/16V/Conductive Polymer/ø8x12
2Pcs 47µF/16V/X5R/1210 plus
1Pcs 270µF Conductive Polymer OR
1Pcs 1000µF Low ESR AlCap
dV1max
160
160
160
90
Unit
mVpp
mVpp
mVpp
mVpp
Table 2 - Suitable capacitors for VSB
External capacitor VSB
1Pcs 10µF/16 V/X7R/1206
dV1max
80
Unit
mVpp
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DATA SHEET
8.2 INTERFACING WITH SIGNALS
A 15V zener diode is added on all signal pins versus signal ground SGND to protect internal circuits from negative and high
positive voltage. Signal pins of several supplies running in parallel can be interconnected directly. A supply having no input
power will not affect the signals of the paralleled supplies.
ISHARE pins must be interconnected without any additional components. This in-/output also has a 15 V zener diode as a
protection device and is disconnected from internal circuits when the power supply is switched off.
8.3 FRONT LEDS
The front-end has 2 front LEDs showing the status of the supply. LED number one is green and indicates AC power is on or
off, while LED number two is bi-colored: green and yellow, and indicates DC power presence or fault situations. For the posi-
tion of the LEDs see Table 3 lists the different LED status.
Table 3 - LED Status
OPERATING CONDITION
AC LED
AC Line within range
AC Line UV condition
DC LED 5)
Normal Operation
PSON_L High
V1 or VSB out of regulation
Over temperature shutdown
Output over voltage shutdown (V1 or VSB)
Output under voltage shutdown (V1 or VSB)
Output over current shutdown (V1 or VSB)
Over temperature warning
Minor fan regulation error (>5%, <15%)
LED SIGNALING
Solid Green
Off
Solid Green
Blinking Yellow (1:1)
Solid Yellow
Blinking Yellow/Green (2:1)
Blinking Yellow/Green (1:1)
5) The order of the criteria in the table corresponds to the testing precedence in the controller.
8.4 PRESENT_L
The PRESENT_L is normally a trailing pin within the connector and will contact only once all other connector contacts are
closed. This active-low pin is used to indicate to a power distribution unit controller that a supply is plugged in. The maximum
sink current on PRESENT_L pin should not exceed 10 mA.
Figure 22 - PRESENT_L signal pin
PFE PDU
V1
VSB
PRESENT_L
8.5 PSKILL INPUT
The PSKILL input is an active-low and normally a trailing pin in the connector and is used to disconnect the main output as
soon as the power supply is being plugged out. This pin should be connected to SGND in the power distribution unit. The
standby output will remain on regardless of the PSKILL input state.
8.6 AC TURN-ON / DROP-OUTS / INOK_L
The power supply will automatically turn-on when connected to the AC line under the condition that the PSON_L signal is
pulled low and the AC line is within range. The INOK_L is an open collector output that requires an external pull-up to a max-
imum of 12V indicating whether the input is within the range the power supply can use and turn on. The INOK_L signal is
active-low. The timing diagram is shown in Figure 23 and referenced in Table 4.
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