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PDF NLHV18T3244 Data sheet ( Hoja de datos )
| Número de pieza | NLHV18T3244 | |
| Descripción | 18-Channel Level Shifter | |
| Fabricantes | ON Semiconductor | |
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NLHV18T3244
18-Channel Level Shifter
The NLHV18T3244 is an 18−channel level translator designed for
high voltage level shifting applications such as displays. The 18
channels are divided into twelve and two three channel groups, with
each group controlled by the inverting inputs SEL1, SEL2 and, SEL3;
respectively. The EN input is used to select the ‘ON’ or power saving
shutdown modes.
Each channel consists of a high voltage output buffer. The output
buffers use N−channel low side and P−channel high side transistors.
The output signal on pins OUT1 to OUT18 is pulled by the transistors
to the positive high or negative low voltage on the VHx and VLx power
supply pins, respectively, depending on the voltage of the inverting
pins.
Features
• 18 Non−Inverting / Inverting Channels
• VH1, VH2 Supply Range: 5 V to 25 V
• VL1, VL2 Supply Range: −13 V to 0 V
• VHx – VLx Difference Range: 5 V to 25 V
• VL1 and VL2 can be tied together or connected to independent supply
voltages as long as VL1 ≤ VL2
• VD Supply Range: 2 V to 5.5 V
• Outputs Specified with 1000 pF Capacitive Loads
• Disable Function
• Low Standby Current
• No Glitch on Power−Up
• Available in: 5 mm x 10 mm, 0.5 mm pitch, QFN50 Package
Typical Applications
• OLED Drivers
• High Voltage Level Shifters
• Piezoelectric Motor Drivers
http://onsemi.com
MARKING
DIAGRAM
1 50
QFN50
CASE 485BW
NLHV
18T3244
AWLYYWWG
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
May, 2013 − Rev. 0
1
Publication Order Number:
NLHV18T3244/D
1 page  
NLHV18T3244
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Condition
Value
Unit
VHx
VLx
VHx −
VLx
VD
VI
High−side DC Supply Voltage
Low−side DC Supply Voltage
Differential VH – VL Voltage
Logic Supply Voltage
Input (IN1 – IN18), Invert (SEL1 – SEL3)
and Enable (EN) Control Pins
−0.5 to +30
−15 to +0.5
0 to +30
−0.5 to +5.5
−0.5 to VD + 0.5
V
V
V
V
V
VOUT
Output Voltage Pins (OUT1 – OUT18)
VLx – 0.5 to VHx + 0.5
V
IOUT
Continuous Output Current (OUT1 –
OUT18)
One channel is sinking or
sourcing current while the
100 mA
remaining seventeen channels
are disconnected (IOUT = 0 A)
IHX DC Supply Current Through VHX
100 mA
ILX DC Supply Current Through VLX
100 mA
ID DC Supply Current Through VD
50 mA
RqJA
Junction to Ambient Resistance
(Note 1)
68 °C/W
TJ Junction Temperature
+115
°C
TSTG
Storage Temperature
−65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. 4 layer PCB with 100 sq. mm, 1 oz. heat spreading including traces, JEDEC 51.7 equivalent.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VH1 High−side DC Supply Voltage
VH2 High−side DC Supply Voltage (Note 2)
VL1 Low−side Negative DC Supply Voltage (Note 3)
(VL1 ≤ VL2)
VL2 Low−side Negative DC Supply Voltage (Note 4)
VHx − VLx Differential VH – VL Voltage
VD Logic Supply Voltage
VI Input (IN1 – IN18), Invert (SEL1 – SEL3) and Enable (EN)
VOUT
Output Voltage (OUT1 – OUT18)
TA Operating Temperature Range
nt/nV
Input Transition Rise or Rate
VI, VIO from 30% to 70% of VD; VD =3.3 ± 0.3 V
2. VH1 and VH2 can be connected together.
3. VL1 must be at the lowest DC supply voltage.
4. VL1 and VL2 can be connected together.
Min
5
5
−13
VL1
5
2
GND
VLx
−40
0
Max Unit
25 V
25 V
0V
0V
25 V
5.5 V
VD V
VHx V
+85 °C
nS
10
http://onsemi.com
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| PDF Descargar | [ Datasheet NLHV18T3244.PDF ] | |
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