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AT25F512B fiches techniques PDF

Adesto - 512-Kbit 2.7V Minimum SPI Serial Flash Memory

Numéro de référence AT25F512B
Description 512-Kbit 2.7V Minimum SPI Serial Flash Memory
Fabricant Adesto 
Logo Adesto 





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AT25F512B fiche technique
Features
Single 2.7V - 3.6V Supply
Serial Peripheral Interface (SPI) Compatible
– Supports SPI Modes 0 and 3
70 MHz Maximum Operating Frequency
– Clock-to-Output (tV) of 6 ns Maximum
Flexible, Optimized Erase Architecture for Code + Data Storage Applications
– Uniform 4-Kbyte Block Erase
– Uniform 32-Kbyte Block Erase
– Full Chip Erase
Hardware Controlled Locking of Protected Sectors via WP Pin
128-Byte Programmable OTP Security Register
Flexible Programming
– Byte/Page Program (1 to 256 Bytes)
Fast Program and Erase Times
– 2.5 ms Typical Page Program (256 Bytes) Time
– 100 ms Typical 4-Kbyte Block Erase Time
– 500 ms Typical 32-Kbyte Block Erase Time
Automatic Checking and Reporting of Erase/Program Failures
JEDEC Standard Manufacturer and Device ID Read Methodology
Low Power Dissipation
– 6 mA Active Read Current (Typical at 20 MHz)
– 5 µA Deep Power-Down Current (Typical)
Endurance: 100,000 Program/Erase Cycles
Data Retention: 20 Years
Complies with Full Industrial Temperature Range
Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options
– 8-lead SOIC (150-mil Wide)
– 8-pad Ultra Thin DFN (2 x 3 x 0.6 mm)
1. Description
The Adesto® AT25F512B is a serial interface Flash memory device designed for use
in a wide variety of high-volume consumer based applications in which program code
is shadowed from Flash memory into embedded or external RAM for execution. The
flexible erase architecture of the AT25F512B, with its erase granularity as small as 4
Kbytes, makes it ideal for data storage as well, eliminating the need for additional data
storage EEPROM devices.
The erase block sizes of the AT25F512B have been optimized to meet the needs of
today's code and data storage applications. By optimizing the size of the erase blocks,
the memory space can be used much more efficiently. Because certain code modules
and data storage segments must reside by themselves in their own erase regions, the
wasted and unused memory space that occurs with large sectored and large block
erase Flash memory devices can be greatly reduced. This increased memory space
efficiency allows additional code routines and data storage segments to be added
while still maintaining the same overall device density.
The device also contains a specialized OTP (One-Time Programmable) Security Reg-
ister that can be used for purposes such as unique device serialization, system-level
Electronic Serial Number (ESN) storage, locked key storage, etc.
Specifically designed for use in 3V systems, the AT25F512B supports read, program,
and erase operations with a supply voltage range of 2.7V to 3.6V. No separate voltage
is required for programming and erasing.
512-Kbit
2.7V Minimum
SPI Serial Flash
Memory
AT25F512B
3689D–DFLASH–11/2012

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