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PDF T835 Data sheet ( Hoja de datos )
| Número de pieza | T835 | |
| Descripción | logic level and standard 8A Triacs | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de T835 (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
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BTA08, BTB08, T810, T835
Snubberless™, logic level and standard 8 A Triacs
A2
G
A2
A1
A2
A1
A2
G
TO-220AB
A1
A2
G TO-220AB Insulated
A1
A2
G
IPAK
A2
A1 A2
G
DPAK
A2
A1 A2
G
D²PAK
Datasheet − production data
Description
Available either in through-hole or surface-mount
packages, the BTA08, BTB08, T810, T835 is
suitable for general purpose AC switching. It can
be used as an ON/OFF function in applications
such as static relays, heating regulation, induction
motor starting circuits or for phase control
operation in light dimmers and motor speed
controllers, etc.
The Snubberless versions (BTABTB08_xxxxW
and T8 series) are specially recommended for
use on inductive loads, thanks to their high
commutation performances.
Logic level versions are designed to interface
directly with low power drivers such as micro-
controller.
By using an internal ceramic pad, the BTA series
provides voltage insulated tab (rated at 2500
VRMS) complying with UL standards
(file ref.: E81734).
Features
• On-state rms current, IT(RMS) 8 A
• Repetitive peak off-state voltage, VDRM/VRRM
600 to 800 V
• Triggering gate current, IGT (Q1) 5 to 50 mA
June 2014
This is information on a product in full production.
DocID7472 Rev 8
1/18
www.st.com
1 page  
BTA08, BTB08, T810, T835
Characteristics
Figure 7. Non-repetitive surge peak on-state
current for a sinusoidal
Figure 8. Relative variation of gate trigger
current
ITSM(A), I2t (A2s)
1000
Tj initial=25°C
100
dI/dt limitation:
50A/µs
360°
ITSM
α I2t
pulse with width tp < 10 ms and corresponding value of I2t
tp(ms)
10
0.01 0.10 1.00 10.00
IGT,IH,IL[Tj] / IGT,IH,IL[Tj=25°C]
2.5
holding current and latching current
versus junction temperature (typical values)
2.0
IGT
1.5
IH & IL
1.0
0.5
Tj(°C)
0.0
-40 -20 0 20 40 60 80 100 120 140
Figure 9. Relative variation of critical rate of
decrease of main current versus (dV/dt)c
(typical values)
(dI/dt)c [(dV/dt)c] / Specified (dI/dt)c
2.2
2.0 TW
Snubberless and Logic level types
1.8
1.6
1.4
1.2 T835/CW/BW
1.0
0.8
T810/SW
0.6
0.4
0.2
0.0
0.1
(dV/dt)c (V/µs)
1.0 10.0
100.0
Figure 10. Relative variation of critical rate of
decrease of main current versus (dV/dt)c
(typical values)
(dI/dt)c [(dV/dt)c] / Specified (dI/dt)c
2.0
1.8
1.6
C
1.4
1.2 B
1.0
0.8
0.6
0.4
0.1
(dV/dt)c (V/µs)
1.0 10.0
Standard types
100.0
Figure 11. Relative variation of critical rate of
decrease of main current versus junction
temperature
Figure 12. DPAK and D2PAK thermal resistance
junction to ambient versus
copper surface under tab
(dI/dt)c [Tj] / (dI/dt)c [Tj specified]
6
5
4
3
2
1
Tj(°C)
0
0 25 50 75
Rth(j-a)(°C/W)
100
90
printed circuit board FR4, copper thickness: 35 µm
80
70
60
50 DPAK
40
30 D2PAK
20
10 S(cm²)
0
100 125 0 4 8 12 16 20 24 28 32 36 40
DocID7472 Rev 8
5/18
18
5 Page 
BTA08, BTB08, T810, T835
Package information
Table 8. TO-220AB (NIns. & Ins. 20-up) dimension values
Dimensions
Ref. Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A 15.20
a1
a2 13.00
B 10.00
b1 0.61
b2 1.23
C 4.40
c1 0.49
c2 2.40
e 2.40
F 6.20
ØI 3.75
I4 15.80
L 2.65
l2 1.14
l3 1.14
M
3.75
16.40
2.60
15.90
14.00
10.40
0.88
1.32
4.60
0.70
2.72
2.70
6.60
3.85
16.80
2.95
1.70
1.70
0.598
0.511
0.393
0.024
0.048
0.173
0.019
0.094
0.094
0.244
0.147
0.622
0.104
0.044
0.044
0.147
0.646
0.102
0.625
0.551
0.409
0.034
0.051
0.181
0.027
0.107
0.106
0.259
0.151
0.661
0.116
0.066
0.066
DocID7472 Rev 8
11/18
18
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet T835.PDF ] | |
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