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PDF HV5122PJ Data sheet ( Hoja de datos )

Número de pieza HV5122PJ
Descripción Serial-to-Parallel Converter
Fabricantes Microchip 
Logotipo Microchip Logotipo



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HV5122 / HV5222
32-Channel, Serial-to-Parallel Converter
with Open-Drain Outputs
Features
• Processed with High Voltage CMOS technology
• Output voltages to 225V using a ramped supply
voltage
• SINK current minimum 100mA
• Shift register speed 8.0MHz
• Strobe and enable inputs
• CMOS compatible inputs
• Forward and reverse shifting options
Description
HV5122 / HV5222 are low-voltage serial to high-volt-
age parallel converters with open-drain outputs. These
devices are primarily designed for use as a driver for
AC electroluminescent displays. HV5122 / HV5222 can
also be used in any application requiring multiple high-
voltage, current-sinking output capabilities such as
driving inkjet and electrostatic print heads, plasma pan-
els, vacuum fluorescent, or large matrix LCD displays.
These devices consist of a 32-bit shift register and con-
trol logic to perform the Output Enable and all-on func-
tions. Data is shifted through the shift register on the
high-to-low transition of the clock. HV5122 shifts in the
counter-clockwise direction when viewed from the top
of the package and HV5222 shifts in the clockwise
direction.
For cascading devices, HV5122 / HV5222 provides a
data output buffer that reflects he current status of the
last bit of the shift register. Operation of the shift regis-
ter is not affected by the OE (Output Enable) or the
STR (Strobe) inputs.
HV5122 / HV5222 are designed to be used in systems
which either switch off the high voltage supply before
changing the state of the high voltage outputs or which
limit the current through each output.
2015 Microchip Technology Inc.
DS20005418B-page 1

1 page




HV5122PJ pdf
HV5122 / HV5222
TABLE 2-1: PIN DESCRIPTION PQFP (CONTINUED)
Pin #
HV5122
HV5222
35 HVOUT1
36 HVOUT2
37 HVOUT3
38 HVOUT4
39 HVOUT5
40 HVOUT6
41 HVOUT7
42 HVOUT8
43 HVOUT9
44 HVOUT10
HVOUT32
HVOUT31
HVOUT30
HVOUT29
HVOUT28
HVOUT27
HVOUT26
HVOUT25
HVOUT24
HVOUT23
High voltage outputs.
Description
TABLE 2-2: PIN DESCRIPTION PLCC
Pin #
HV5122
HV5222
1 HVOUT16
2 HVOUT17
3 HVOUT18
4 HVOUT19
5 HVOUT20
6 HVOUT21
7 HVOUT22
8 HVOUT23
9 HVOUT24
10 HVOUT25
11 HVOUT26
12 HVOUT27
13 HVOUT28
14 HVOUT29
15 HVOUT30
16 HVOUT31
17 HVOUT32
18 DATA OUT
HVOUT17
HVOUT16
HVOUT15
HVOUT14
HVOUT13
HVOUT12
HVOUT11
HVOUT10
HVOUT9
HVOUT8
HVOUT7
HVOUT6
HVOUT5
HVOUT4
HVOUT3
HVOUT2
HVOUT1
DATA OUT
19
20
21
N/C
22
N/C
23 OE
OE
24 CLK
25 GND
26 VDD
27 STR
CLK
GND
VDD
STR
Description
High voltage outputs
Data output for cascading to the data input of the next device.
No connect.
Output enable input.
When OE is LOW, all HV outputs are forced into a LOW state,
regardless of data in each channel. When OE is HIGH, all HV
outputs reflect data latched.
Data shift register clock. Input are shifted into the shift register on
the positive edge of the clock.
Logic and high voltage ground.
Low voltage logic power rail.
Strobe.
2015 Microchip Technology Inc.
DS20005418B-page 5

5 Page





HV5122PJ arduino
HV5122 / HV5222
44-Lead PLCC Package Outline (PJ)
.653x.653in body, .180in height (max), .050in pitch
.048/.042 x 45O
6
D
D1
1 44
40
.056/.042 x 45O
.150 MAX
.075 MAX
Note 1
(Index Area)
E1 E
.020max
(3 Places)
Note 2
Top View
Vertical Side View
A
A2
A1
e
Horizontal Side View
View B
Base .020 MIN
Plane
Seating
Plane
b1
b
View B
R
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Notes:
1. $3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEHDPROGHGPDUNLGHQWL¿HUDQHPEHGGHGPHWDOPDUNHURU
a printed indicator.
2. $FWXDOVKDSHRIWKLVIHDWXUHPD\YDU\
Symbol
A A1 A2 b
Dimension
(inches)
MIN
NOM
MAX
.165
.172
.180
.090
.105
.120
.062
-
.083
.013
-
.021
JEDEC Registration MS-018, Variation AC, Issue A, June, 1993.
† This dimension differs from the JEDEC drawing.
Drawings not to scale.
b1
.026
-
.036
D
.685
.690
.695
D1
.650
.653
.656
E
.685
.690
.695
E1
.650
.653
.656
e
.050
BSC
R
.025
.035
.045
2015 Microchip Technology Inc.
DS20005418B-page 11

11 Page







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