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PDF HV57908PG-G Data sheet ( Hoja de datos )
| Número de pieza | HV57908PG-G | |
| Descripción | 64-Channel Serial to Parallel Converter | |
| Fabricantes | Supertex | |
| Logotipo |  |
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Supertex inc.
HV57908
8MHz, 64-Channel Serial to Parallel Converter
with Push-Pull Outputs
Features
►►HVCMOS® technology
►►5.0V CMS Logic
►►Output voltage up to +80V
►►Low power level shifting
►►8.0MHz data rate
►►Latched data outputs
►►Forward and reverse shifting options (DIR pin)
►►Diode to VPP allows efficient power recovery
►►Outputs may be hot switched
General Description
The HV57908 is a low voltage serial to high voltage parallel
converter with push-pull outputs. The device has been designed
for use as a driver for EL displays. It can also be used in any
application requiring multiple output high voltage current sourcing
and sinking capability such as driving plasma panels, vacuum
fluorescent displays, or large matrix LCD displays.
The device consists of a 64-bit shift register, 64 latches and control
logic to perform the polarity select and blanking of the outputs.
HVOUT1 is connected to the first stage of the first shift register
through the polarity and blanking logic. Data is shifted through the
shift registers on the logic low to high transition of the clock. The
DIR pin causes CCW shifting when connected to GND, and CW
shifting when connected to VDD. A data output buffer is provided
for cascading devices. This output reflects the current status of
the last bit of the shift register (HVOUT64). Operation of the shift
register is not affected by the LE (latch enable), BL (blanking), or
the POL (polarity) inputs. Transfer of data from the shift registers
to the latches occurs when the LE input is high. The data in the
latches is stored when the LE is low.
Functional Block Diagram
POL
BL
LE
VPP
DI/OA
CLK
DIR
64-bit
Static Shift
Register
64 Latches
Doc.# DSFP-HV57908
A061913
DI/OB
HVOUT1
HVOUT2
•
•
•
60 Additional
Outputs
•
•
•
HVOUT63
HVOUT64
Supertex inc.
www.supertex.com
1 page  
Function Table
Function
Data
CLK
Inputs
LE BL
All O/P high
X
X
All O/P low
X
X
O/P normal
X
X
O/P inverted
Data falls
through
(latches
transparent)
X
L
H
L
H
X
_
_↑
_
_↑
_
_↑
_
_↑
Data stored/
latches loaded
X
X
X
X
I/O relation
DI/OA
DI/OB
_
_↑
_
_↑
Notes:
* = dependent upon previous stage’s state.
X
X
X
X
H
H
H
H
L
L
X
X
L
L
H
H
H
H
H
H
H
H
X
X
HV57908
POL
L
H
H
L
H
H
L
L
H
L
X
X
Outputs
DIR Shift Reg HV Outputs
X-
H
X-
L
X - No inversion
X-
Inversion
XL
L
XH
H
XL
H
XH
L
X * Stored Data
X
*
Inversion of
stored data
H QN→QN+1
L QN→QN-1
-
-
Data Out
-
-
-
-
-
-
-
-
-
-
DI/OB
DI/OA
Shift Register Operation
HVOUT32
•
•
•
DIR = H; CW (HVOUT1 → HVOUT64)
DIR = L; CCW (HVOUT64 → HVOUT1)
DIR = H
DIR = L
SR
HVOUT33
•
•
•
••
••
HVOUT2
HVOUT1
Pin
25
D I/OA
HVOUT63
39
D I/OB
HVOUT64
Doc.# DSFP-HV57908
A061913
Supertex inc.
5 www.supertex.com
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet HV57908PG-G.PDF ] | |
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