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PDF HV632PG-G Data sheet ( Hoja de datos )
| Número de pieza | HV632PG-G | |
| Descripción | 256 Gray-Shade High Voltage Driver | |
| Fabricantes | Supertex | |
| Logotipo |  |
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Supertex inc.
HV632
32-Channel,
256 Gray-Shade High Voltage Driver
Features
►►HVCMOS® technology
►►5.0V CMOS inputs
►►Output voltage up to +80V
►►PWM gray shade conversion
►► Capable of 256 levels of gray shading
►►10MHz shift and count clock frequency
►► 20MHz data throughput rate
►►8 bit data bus
►►32 outputs per device
►► BLANK function
►►Output polarity control
Applications
►►Field Emission Displays (FED)
►►Polymer Liquid Crystal Displays (PLCD)
►►Vacuum Fluorescent Displays (VFD)
General Description
The HV632 is a 32-channel gray-shade column driver IC designed for
driving electrofluorescent displays. Using Supertex’s unique HVCMOS®
technology, it is capable of 256 levels of gray shading by PWM conversion.
Input data, in groups of eight, is latched into a set of data latches on both
edges of the shift clock. The data shifted in the first data latch corresponds
to HVOUT1, the second data latch corresponds to HVOUT2, and so on. These
data are compared to the contents of the master binary counter which counts
on both edges of the count clock. Each time the master counter begins to
decrement from 1111 1111, the data in the data latches are compared with
the contents of the counter; if they match, the corresponding outputs will
go high. The master counter counts down to 00000001 and then starts
to count up again. The outputs that are at high will stay at high until the
contents of the counter match the data in the data latches again. Therefore,
the higher the binary data in the data latches, the longer the outputs will
stay at high. Thus, different high voltage pulse widths are produced. When
the counter reaches its 1111 1111 count while counting up, the device is
ready for the next operation cycle. A data value of 0000 0000 produces no
pulse; the output stays low.
The BLANK input signal will reset the master counter to all ones (1111 1111)
and set all high voltage outputs to low, or will set all high voltage outputs to
high state, when the POL is low. The POL input signal, forced low, will invert
the polarity of the output pulse. If left unconnected, POL input will be pulled
high to VDD by an on-chip resistor.
Typical Application Circuit
Low Voltage
Power Supply
High Voltage
Power Supply
DIN(1-8)
HV632
High Voltage
HVOUT1
SC
Micro
Processor
CSI
CC
LC
BL
Low Voltage
Level
Translators
Latches
Counter
Comparators
32
&
Push-Pull
Output
Buffers
POL
CSO
Shift Register
CSI for cascading the next HV632
HVOUT32
Columns
(Cathodes)
Display
Panel
(FED)
Scan
Driver
HV57908
Doc.# DSFP-HV632
A061913
Supertex inc.
www.supertex.com
1 page  
Timing Diagrams
CSO
tCW
CSI
Shift
Clock
tCSS
50%
50%
tCSH
SC1
LOADING LAST DEVICE
tSCC
SC2
tCSOH
SC16
Data 50%
1-8 tDSS
Load
Count
DATA
SET1
DATA
SET2
tDSH
DATA
SET3
tDW
tLCW
50%
50%
Count
Clock
tLCD
50%
DATA
SET31
DATA
SET32
50%
tCCW
50%
tCCD
90%
tCSOL
NEXT LOADING CYCLE
SC1
DATA
SET 1
DATA
SET 2
tCCC
50%
SCN
DATA
DATA
SET2n-1 SET2n
50%
tCCD
90%
HV632
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VPP
HVOUT
BLANK
HVOUT
Count
Clock
50%
tBLW
10%
50%
tBLD
90%
50%
255 254 3 2 1
tCDD
10%
50%
1
2
3
HVGND
VIH
VIL
VPP
HVGND
VIH
VIL
CSI
Shift
Clock
CSO
LC
Count
Clock
HVOUT
1234
VALID DATA
16
1234
VALID DATA
16
255 254 253 252
255 254 253 252
1
1
1 252 253 254 255
1 252 253 254 255
Doc.# DSFP-HV632
A061913
5 Supertex inc.
www.supertex.com
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HV632PG-G.PDF ] | |
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