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Aeroflex Circuit Technology - 8-Bit Shift Registers

Numéro de référence UT54ACS164E
Description 8-Bit Shift Registers
Fabricant Aeroflex Circuit Technology 
Logo Aeroflex Circuit Technology 





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UT54ACS164E fiche technique
UT54ACS164E/UT54ACTS164E
8-Bit Shift Registers
October, 2008
www.aeroflex.com/Logic
FEATURES
AND-gated (enable/disable) serial inputs
Fully buffered clock and serial inputs
Direct clear
• 0.6μm CRH CMOS Process
- Latchup immune
High speed
Low power consumption
Wide operating power supply from 3.0V to 5.5V
Available QML Q or V processes
14-lead flatpack
DESCRIPTION
The UT54ACS164E and the UT54ACTS164E are 8-bit shift
registers which feature AND-gated serial inputs and an asyn-
chronous clear. The gated serial inputs (A and B) permit com-
plete control over incoming data. A low at either input inhibits
entry of new data and resets the first flip-flop to the low level
at the next clock pulse. A high-level at both serial inputs sets
the first flip-flop to the high level at the next clock pulse. Data
at the serial inputs may be changed while the clock is high or
low, providing the minimum setup time requirements are met.
Clocking occurs on the low-to-high-level transition of the clock
input.
The devices are characterized over full HiRel temperature range
of -55°C to +125°C.
PINOUT
A
B
QA
QB
QC
QD
VSS
14-Lead Flatpack
Top View
1 14
2 13
3 12
4 11
5 10
69
78
VDD
QH
QG
QF
QE
CLR
CLK
FUNCTION TABLE
CLR
INPUTS
CLK A
LXX
HLX
HH
HL
HX
OUTPUTS
B QA
QB ... QH
XLLL
X
QA0
QB0
QH0
H
H
QAn
QGn
X
L
QAn
QGn
L
L
QAn
QGn
Notes:
1. QA0, QB0, QH0 = the level of QA, QB or QH, respectively, before the indicated
steady-state input conditions were established.
2. QAn and QGn = the level of QA or QG before the most recent transition of
the clock; indicates a one-bit shift.
LOGIC SYMBOL
(9)
CLR
(8)
CLK
A (1)
(2)
B
SRG8
R
C1/
&
1D
(3)
QA
(4)
(5) QB
(6) QC
(10) QD
(11) QE
(12) QF
(13) QG
QH
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
1

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