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PDF CY7C1041GN Data sheet ( Hoja de datos )
| Número de pieza | CY7C1041GN | |
| Descripción | 4-Mbit (256K words x 16 bit) Static RAM | |
| Fabricantes | Cypress | |
| Logotipo |  |
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CY7C1041GN
4-Mbit (256K words × 16 bit) Static RAM
4-Mbit (256K words × 16 bit) Static RAM
Features
■ High speed
❐ tAA = 10 ns / 15 ns
■ Low active and standby currents
❐ Active current: ICC = 38-mA typical
❐ Standby current: ISB2 = 6-mA typical
■ Operating voltage range: 1.65 V to 2.2 V, 2.2 V to 3.6 V, and
4.5 V to 5.5 V
■ 1.0-V data retention
■ TTL-compatible inputs and outputs
■ Pb-free 44-pin SOJ, 44-pin TSOP II, and 48-ball VFBGA
packages
Functional Description
CY7C1041GN is high-performance CMOS fast static RAM
Organized as 256K words by 16-bits.
Data writes are performed by asserting the Chip Enable (CE) and
Write Enable (WE) inputs LOW, while providing the data on I/O0
through I/O15 and address on A0 through A17 pins. The Byte High
Enable (BHE) and Byte Low Enable (BLE) inputs control write
operations to the upper and lower bytes of the specified memory
location. BHE controls I/O8 through I/O15 and BLE controls I/O0
through I/O7.
Data reads are performed by asserting the Chip Enable (CE) and
Output Enable (OE) inputs LOW and providing the required
address on the address lines. Read data is accessible on the I/O
lines (I/O0 through I/O15). Byte accesses can be performed by
asserting the required byte enable signal (BHE or BLE) to read
either the upper byte or the lower byte of data from the specified
address location.
All I/Os (I/O0 through I/O15) are placed in a high-impedance state
during the following events:
■ The device is deselected (CE HIGH)
■ The control signals (OE, BLE, BHE) are de-asserted
The logic block diagram is on page 2.
Product Portfolio
Product
CY7C1041GN18
CY7C1041GN30
CY7C1041GN
Range
Industrial
VCC Range (V)
1.65 V–2.2 V
2.2 V–3.6 V
4.5 V–5.5 V
Speed
(ns)
10/15
15
10
10
Power Dissipation
Operating ICC, (mA)
f = fmax
Typ [1]
Max
Standby, ISB2 (mA)
Typ [1]
Max
– 40 6
8
38 45
38 45
Notes
1. Typical values are included only for reference and are not guaranteed or tested. Typical values are measured at VCC = 1.8 V (for a VCC range of 1.65 V–2.2 V),
VCC = 3 V (for a VCC range of 2.2 V–3.6 V), and VCC = 5 V (for a VCC range of 4.5 V–5.5 V), TA = 25 °C.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-95413 Rev. *B
• San Jose, CA 95134-1709 • 408-943-2600
Revised February 1, 2016
1 page  
CY7C1041GN
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage temperature ................................ –65 C to +150 C
Ambient temperature
with power applied ................................... –55 C to +125 C
Supply voltage
on VCC relative to GND [4] .................. –0.5 V to VCC + 0.5 V
DC voltage applied to outputs
in HI-Z State [4] ................................... –0.5 V to VCC + 0.5 V
DC Electrical Characteristics
DC input voltage [4] ............................. –0.5 V to VCC + 0.5 V
Current into outputs (in LOW state) ............................ 20 mA
Static discharge voltage
(MIL-STD-883, Method 3015) ................................. > 2001 V
Latch-up current .................................................... > 140 mA
Operating Range
Grade
Industrial
Ambient Temperature
–40 C to +85 C
VCC
1.65 V to 2.2 V,
2.2 V to 3.6 V,
4.5 V to 5.5 V
Over the operating range of –40 C to 85 C
Parameter
Description
Test Conditions
10 ns / 15 ns
Min Typ[5] Max
Unit
VOH
Output HIGH
voltage
1.65 V to 2.2 V VCC = Min, IOH = –0.1 mA
2.2 V to 2.7 V VCC = Min, IOH = –1.0 mA
2.7 V to 3.6 V VCC = Min, IOH = –4.0 mA
4.5 V to 5.5 V VCC = Min, IOH = –4.0 mA
4.5 V to 5.5 V VCC = Min, IOH = –0.1 mA
VOL
Output LOW
voltage
1.65 V to 2.2 V VCC = Min, IOL = 0.1 mA
2.2 V to 2.7 V VCC = Min, IOL = 2 mA
2.7 V to 3.6 V VCC = Min, IOL = 8 mA
4.5 V to 5.5 V VCC = Min, IOL = 8 mA
VIH
Input HIGH
voltage
1.65 V to 2.2 V –
2.2 V to 2.7 V –
2.7 V to 3.6 V –
4.5 V to 5.5 V –
VIL
Input LOW
voltage
1.65 V to 2.2 V –
2.2 V to 2.7 V –
2.7 V to 3.6 V –
4.5 V to 5.5 V –
1.4 –
–V
2––
2.2 –
–
2.4
VCC – 0.5[6]
–
–
–
–
–
–
0.2 V
– – 0.4
– – 0.4
–
1.4
2
2
2.2
–0.2[4]
–0.3[4]
–0.3[4]
–0.5[4]
– 0.4
– VCC + 0.2[4] V
– VCC + 0.3[4]
– VCC + 0.3[4]
– VCC + 0.5[4]
– 0.4 V
– 0.6
– 0.8
– 0.8
IIX Input leakage current
GND < VIN < VCC
–1 – +1 A
IOZ
Output leakage current
GND < VOUT < VCC, Output disabled
–1
–
+1 A
ICC
Operating supply current
CMMaxOVSClCe,vIeOlsUT = 0 mA,
f = 100 MHz
f = 66.7 MHz
–
–
38 45 mA
– 40
ISB1
Automatic CE power-down
current – TTL inputs
MVIaNx>VVCICH,
CE >
or VIN
V<IHV,IL,
f
=
fMAX
–
ISB2
Automatic CE power-down
current – CMOS inputs
VMIaNx>VVCCCC,
CE >
– 0.2
VVCoCr
– 0.2 V,
VIN < 0.2
V,
f
=
0
–
– 15 mA
6 8 mA
Notes
4. VIL(min) = –2.0 V and VIH(max) = VCC + 2 V for pulse durations of less than 2 ns.
5. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = 1.8 V (for VCC range of 1.65 V–2.2 V), VCC = 3 V
(for VCC range of 2.2 V–3.6 V), and VCC = 5 V (for VCC range of 4.5 V–5.5 V), TA = 25 °C.
6. This parameter is guaranteed by design and not tested.
Document Number: 001-95413 Rev. *B
Page 5 of 18
5 Page 
CY7C1041GN
Switching Waveforms (continued)
Figure 10. Write Cycle No. 3 (BLE or BHE Controlled) [23, 24]
tWC
ADDRESS
CE
BHE /
BLE
WE
DATA I /O
ADDRESS
CE1
CE2
WE
BHE/BLE
tSCE
tAW
tSA
tBW
tHA
tPWE
t HZWE
tSD tHD tLZWE
DATA IN VALID
Figure 11. Write Cycle No. 4 (WE Controlled) [23, 24, 25]
tWC
tSCE
tAW
tSA tPWE
tBW
tHA
OE
DATA I/O NOTE 26
tHZOE
tSD
DATA IN VALID
tHD
Notes
23. The internal write time of the memory is defined by the overlap of WE = VIL, CE = VIL, and BHE or BLE = VIL. These signals must be LOW to initiate a write, and the
HIGH transition of any of these signals can terminate the operation. The input data setup and hold timing should be referenced to the edge of the signal that terminates
the write.
24. Data I/O is in HI-Z state if CE = VIH, or OE = VIH, or BHE, and/or BLE = VIH.
25. Data I/O is high impedance if OE = VIH.
26. During this period the I/Os are in output state. Do not apply input signals.
Document Number: 001-95413 Rev. *B
Page 11 of 18
11 Page | ||
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| PDF Descargar | [ Datasheet CY7C1041GN.PDF ] | |
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