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Analog Devices - CPRI and 10G Ethernet Data Recovery IC

Numéro de référence ADN2905
Description CPRI and 10G Ethernet Data Recovery IC
Fabricant Analog Devices 
Logo Analog Devices 





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ADN2905 fiche technique
Data Sheet
CPRI and 10G Ethernet Data Recovery IC
with Amp/EQ from 614.4 Mbps to 10.3125 Gbps
ADN2905
FEATURES
GENERAL DESCRIPTION
Serial CPRI data rates
614.4 Mbps, 1.2288 Gbps, 2.4576 Gbps, 3.072 Gbps,
4.9152 Gbps, 6.144 Gbps, and 9.8304 Gbps
Ethernet data rates: 1.25 Gbps and 10.3125 Gbps
No reference clock required
Jitter performance superior to the SFF-8431 jitter specifications
Optional equalizer or 0 dB EQ input mode
Quantizer sensitivity: 200 mV p-p typical (equalizer mode)
Sample phase adjust (5.65 Gbps or greater)
Output polarity invert
I2C to access optional features
Loss of lock (LOL) indicator
PRBS generator/detector
Application aware power
349.5 mW at 9.8304 Gbps, 0 dB EQ input mode
287.7 mW at 6.144 Gbps, 0 dB EQ input mode
249.3 mW at 3.072 Gbps, 0 dB EQ input mode
Power supply: 1.2 V, flexible 1.8 V to 3.3 V, and 3.3 V
4 mm × 4 mm, 24-lead LFCSP
APPLICATIONS
The ADN2905 provides the receiver functions of quantization and
multirate data recovery at 614.4 Mbps, 1.2288 Gbps, 1.25 Gbps,
2.4576 Gbps, 3.072 Gbps, 4.9152 Gbps, 6.144 Gbps, 9.8304 Gbps,
and 10.3125 Gbps, used in Common Public Radio Interface
(CPRI) and gigabit Ethernet applications. The ADN2905
automatically locks to all the specified CPRI and Ethernet data
rates without the need for an external reference clock or
programming. The ADN2905 jitter performance exceeds the
jitter requirement specified by SFF-8431.
The ADN2905 provides manual sample phase adjustment.
Additionally, the user can select an equalizer or a 0 dB EQ as the
input. The equalizer is either adaptive or can be manually set.
The ADN2905 also supports pseudorandom binary sequence
(PRBS) generation, bit error detection, and input data rate
readback features.
The ADN2905 is available in a compact 4 mm × 4 mm, 24-lead
chip scale package (LFCSP). All ADN2905 specifications are
defined over the ambient temperature range of −40°C to +85°C,
unless otherwise noted.
SFF-8431-compatible
Ethernet: 10GE, 1GE, and CPRI: OS/L.6 up to OS/L.96
FUNCTIONAL BLOCK DIAGRAM
SCK
SDA
LOL
REFCLKP/
REFCLKN
(OPTIONAL)
DATOUTP/
DATOUTN
I2C_ADDR
I2C REGISTERS
FREQUENCY
ACQUISITION
AND LOCK
DETECTOR
DATA RATE
ADN2905
CML
CLK
DDR
SAMPLE
PHASE
ADJUST
FIFO
÷N ÷2
PIN
2 0dB EQ
DATA
INPUT
NIN SAMPLER
50Ω 50Ω
EQ
I2C
VCM
VCC
FLOAT
I2C
RXD
RXCK
DOWNSAMPLER
AND LOOP
FILTER
PHASE
SHIFTER
DCO
CLOCK
Figure 1.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2014–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

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