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PDF ISL8018 Data sheet ( Hoja de datos )
| Número de pieza | ISL8018 | |
| Descripción | 8A Low Quiescent Current High Efficiency Synchronous Buck Regulator | |
| Fabricantes | Intersil | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ISL8018 (archivo pdf) en la parte inferior de esta página. Total 21 Páginas | ||
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DATASHEET
8A Low Quiescent Current High Efficiency Synchronous
Buck Regulator
ISL8018
The ISL8018 is a high efficiency, monolithic, synchronous
step-down DC/DC converter that can deliver up to 8A continuous
output current from a 2.7V to 5.5V input supply. The output
voltage is adjustable from 0.6V to VIN. With an adjustable current
limit, reverse current protection, prebias start and
over-temperature protection, the ISL8018 offers a highly robust
power solution. It uses current control architecture to deliver fast
transient response and excellent loop stability.
The ISL8018 integrates a pair of low ON-resistance P-channel
and N-channel internal MOSFETs to maximize efficiency and
minimize external component count. 100% duty-cycle operation
allows less than 250mV dropout at 8A output current. Adjustable
frequency and synchronization allow the ISL8018 to be used in
applications requiring low noise.
The ISL8018 can be configured for discontinuous or forced
continuous operation at light load. Forced continuous operation
reduces noise and RF interference while discontinuous mode
provides high efficiency by reducing switching losses at light loads.
The ISL8018 is offered in a space saving 20 Ld 3x4 QFN lead free
package with exposed pad lead frames for excellent thermal
performance. The complete converter occupies less than
96.8mm2 area.
See Ordering Information on page 2 for more detail.
Related Literature
• UG052 “ISL8018DEMO1Z Demonstration Board User Guide”
• UG053 “ISL8018EVAL3Z Evaluation Board User Guide”
Features
• High efficiency synchronous buck regulator with up to 97%
efficiency
• ±10% output voltage margining
• Adjustable current limit
• Start-up with prebiased output
• Internal soft-start - 1ms or adjustable, internal/external
compensation
• Soft-stop output discharge during disabled
• Adjustable frequency from 500kHz to 4MHz - default at 1MHz
• External synchronization up to 4MHz - master to slave phase
shifting capability
• Peak current limiting, hiccup mode short-circuit protection and
over-temperature protection
Applications
• DC/DC POL modules
• µC/µP, FPGA and DSP power
• Plug-in DC/DC modules for routers and switchers
• Portable instruments
• Test and measurement systems
• Li-ion battery powered devices
September 30, 2015
FN7889.0
100
95
3.3VOUT PFM
90
3.3VOUT PWM
85
80
75
70
01 2 3 4 5 6
IOUT (A)
FIGURE 1. EFFICIENCY T = +25°C VIN = 5V
7
8
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1 page  
Block Diagram
ISL8018
SS
SHUTDOWN
SOSoFfTt-
START
COMP
55pF
168k
EN
VSET
BANDGAP VREF
EAMP
-
3pF
+
VFB
6k
0.8V
-
SLSOloPpEe
COMP
+ OV
0.85*VREF
-
+
UV
PG
SGND
1ms
DELAY
0.1V
-
SCP
+
FS SYNCIN
SYNCOUT
SHUTDOWN
250µA
VDD
+
COMP
-
OSCILLATOR
PWM/PFM
LOGIC
CONTROLLER
PROTECTION
HS DRIVER
+
OCP
-
+
SKIP
-
+
CSA
-
ISET
THRESHOLD
NEG CURRENT
SENSING
ZERO-CROSS
SENSING
SHUTDOWN
VIN
LS
DRIVER
P
PHASE
N
PGND
ISET
100
FIGURE 3. FUNCTIONAL BLOCK DIAGRAM
Submit Document Feedback
5
FN7889.0
September 30, 2015
5 Page 
ISL8018
Typical Operating Performance Unless otherwise noted, operating conditions are: TA = +25°C, VIN = 5V, EN = 3.3V,
SYNCIN = VIN, L = 1µH, C1 = 2x22µF, C2 = 4x22µF, VOUT = 1.8V, IOUT = 0A to 8A. (Continued)
PHASE 2V/DIV
PHASE 2V/DIV
VOUT RIPPLE 20mV/DIV
IL 1A/DIV
500ns/DIV
FIGURE 16. STEADY STATE OPERATION AT NO LOAD (PWM)
VOUT RIPPLE 20mV/DIV
IL 1A/DIV
2µs/DIV
FIGURE 17. STEADY STATE OPERATION AT NO LOAD (PFM)
PHASE 2V/DIV
IL 2A/DIV
VOUT RIPPLE 20mV/DIV
500ns/DIV
FIGURE 18. STEADY STATE OPERATION WITH FULL LOAD
VOUT RIPPLE 50mV/DIV
IL 2A/DIV
1ms/DIV
FIGURE 19. LOAD TRANSIENT (PWM)
VOUT RIPPLE 50mV/DIV
IL 2A/DIV
1ms/DIV
FIGURE 20. LOAD TRANSIENT (PFM)
Submit Document Feedback 11
EN 2V/DIV
VOUT 1V/DIV
IL 2A/DIV
PG 5V/DIV
5ms/DIV
FIGURE 21. SOFT-START WITH NO LOAD (PWM)
FN7889.0
September 30, 2015
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet ISL8018.PDF ] | |
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