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PDF PE35400 Data sheet ( Hoja de datos )

Número de pieza PE35400
Descripción Divide-by-4 Prescaler
Fabricantes Peregrine Semiconductor 
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No Preview Available ! PE35400 Hoja de datos, Descripción, Manual

PE35400
Document Category: Product Specification
UltraCMOS® Divide-by-4 Prescaler, 3–13.5 GHz
Features
• High frequency support up to 13.5 GHz
• Low SSB phase noise of –135 dBc/Hz @
3.025 GHz output frequency
• Low supply current of 16 mA
• Bare die
Applications
• Wireless communication
• Test and measurement
• Phased array radar
Figure 1 • PE35400 Functional Diagram
DQ
Q
DQ
Q
Product Description
The PE35400 is a high-performance UltraCMOS® prescaler with a fixed divide ratio of 4. It supports an operating
frequency range from 3–13.5 GHz. It operates on a single voltage supply with a frequency-selecting bias resistor
and draws a low current of 16 mA. The PE35400 is available in bare die.
The PE35400 is manufactured on Peregrine’s UltraCMOS process, a patented variation of silicon-on-insulator
(SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of
conventional CMOS.
©2015, Peregrine Semiconductor Corporation. All rights reserved. • Headquarters: 9380 Carroll Park Drive, San Diego, CA, 92121
Product Specification
www.psemi.com
DOC-64872-2 – (10/2015)

1 page




PE35400 pdf
PE35400
Divide-by-4 Prescaler
Typical Performance Data
Figure 3 through Figure 11 show the typical performance data @ +25 °C, VDD = 2.8V (ZS = ZL = 50), based on
optimal RBIAS as shown in Figure 3, unless otherwise specified.
Figure 3 • Frequency vs RBIAS
16
14
12
10
8
6
4
2
0
5.6
Lower Freq Limit (PIN = 0 dBm)
Optimal Level
Upper Freq Limit (PIN = -7 dBm)
Upper Freq Limit (PIN = 0 dBm)
Lower Freq Limit (PIN = -7 dBm)
8.2 12 18 27 39 56
RBIAS (kΩ)
DOC-64872-2 – (10/2015)
www.psemi.com
Page 5

5 Page





PE35400 arduino
PE35400
Divide-by-4 Prescaler
Die Mechanical Specifications
This section provides the die mechanical specifications for the PE35400.
Table 5 • Mechanical Specifications for PE35400
Parameter
Min Typ Max Unit
Die size, singulated (x,y)
Wafer thickness
Wafer size
866 × 716
180
886 × 736
200
150
916 × 766
220
µm
µm
mm
Condition
Including excess sapphire, max
tolerance = –20/+30 µm
Table 6 • Pad Coordinates for PE35400(*)
Pad Pad Pad Center (µm)
No. Name
XY
Pad Opening
Size (µm)
XY
1
VBYPS
–303
198
160
180
2
VBPYS
–303
–3
160 180
3 RFIN –303
–208
100
100
4 GND
68
–243
290
130
5 RFOUT 333
–193
100
190
6 VDD 318 40 130 190
7 RBIAS 318 243 130 130
8 GND
14
243 290 130
Note: * All pad locations originate from the die center and refer to the
center of the pad.
Figure 13 • Pad Layout for PE35400(1)(2)
1
VBYPS
2
VBYPS
8
GND
3
RFIN
Die ID
4
GND
886 μm (−20 / +30 μm)
Notes:
1) Drawings are not drawn to scale.
2) Singulated die size shown, pad side up.
7
RBIAS
6
VDD
5
RFOUT
DOC-64872-2 – (10/2015)
www.psemi.com
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