PE99151DIE Datasheet PDF - Peregrine Semiconductor
| Part Number | PE99151DIE | |
| Description | Monolithic Point-of-Load Synchronous Buck Regulator | |
| Manufacturers | Peregrine Semiconductor | |
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Product Description
The PE99151 is a radiation tolerant point-of-load buck
regulator delivering high efficiency at VIN = 5V and output
currents up to 2A continuous. This single-chip solution is
perfect for Hi-Rel applications and delivers peak
efficiency exceeding 93%. A minimal external component
count and high switching frequency enables >10 W/in2
standard PCB designs while high efficiency minimizes
thermal concerns. All power switching devices are
integrated on-chip.
Fabricated in Peregrine’s patented UltraCMOS®
technology, the PE99151 offers excellent power
efficiency and intrinsic radiation tolerance.
Table 1. Radiation Performance
TID 100 kRad(Si)
SEL > 90 MeV•cm2/mg
SEB
> 90 MeV•cm2/mg
SET
> 90 MeV•cm2/mg
SEFI
> 90 MeV•cm2/mg
SEGR
> 90 MeV•cm2/mg
SEL, SEB, SEGR, SEU, SEFI: None observed, Au/60 degrees
SET: No events exceeding 30 mV transient observed @ Au,
LET=90, 60 degrees and normal incidence
Figure 1. Typical Application Diagram
Product Specification
PE99151 DIE
Hi-Rel 2A DC-DC Converter
Radiation Tolerant UltraCMOS®
Monolithic Point-of-Load Synchronous
Buck Regulator with Integrated Switches
Features
Up to 2A continuous
Output voltage range from 1.0–3.6V
by external select resistors
Input voltage range 4.6–6.0V
Current mode control, pulse-by-pulse
current limit, current sharing enabled
and (N+K) redundancy compatible
shutdown mode
SYNC function, 100 kHz–5 MHz lock
range with selectable 500 kHz /1 MHz
free running frequency
Shutdown pin, Power Good output pin
for supply sequencing
Better than 1% typical initial accuracy
(25°C)
Control inputs compatible with TTL,
LVTTL, LVCMOS (2.5V and 3.3V)
and 5V CMOS
Document No. DOC-50370-6 │ www.e2v-us.com
©2012–2015 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 15
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PE99151 DIE
Product Specification
Table 3. Pin Coordinates and Descriptions
(continued)
Pin
No.
Pin Name
X
Y
Description
25
EAINP
–1343.9
1068.3
Error Amplifier (+) Input,
Load Feedback
1.000V Reference output,
26
VREF
–1343.9
1266.9
Loop to AAINP. Additional
Low Pass Filtering May be
Necessary
27
GND
–1343.9 1437.25 Ground
28
AGND
–1142.8 1283.2 Bandgap ground
29
RSET
–1142.8
–1283.2
Resistor to Set Reference
Current
30
SScap
–944.2
1283.2
Resistor to Set Reference
Current
31
SYNCOb
–944.2
–1283.2
Loop-Through Comple-
ment Output
32
SYNC
–745.6
1283.2
Loop-Through Comple-
ment Output
33 PGOOD –745.6 –1283.2 Power Good Flag Output
34 SDb –547 1283.2 Shutdown (L)/enable input
35
RSEL_SDAT
–547
–1283.2
Reference Resistor
Selection
36
TEST
–348.4 1283.2 Ground
37
SCLK
–348.4 –1283.2 Ground
38 VIN 602.5 1000 Input Power Supply
39
VIN
1102.5
0 Input Power Supply
40 VIN 602.5 –1000 Input Power Supply
Table 4. Operating Ranges
Symbol
Parameter/Condition
VIN Power supply voltage
TA
Operating temperature range
(ambient)
Min Max
4.6 6.0
–55 +125
Unit
V
°C
Table 5. Absolute Maximum Ratings
Symbol
Parameter/Condition
Min Max Unit
VIN Power supply voltage
Tj
Operating temperature range
(junction)
–0.5 6.5
–55 +145
V
oC
TST Storage temperature range
–65 +150 oC
II DC into any signal input
–10 10 mA
IO DC into any signal output
–50 50 mA
IP DC into any single power pin
–2 2
A
Exceeding absolute maximum ratings may cause
permanent damage. Operation between maximum
operating range and absolute maximum for
extended periods may reduce reliability.
Table 6. Electrostatic Discharge (ESD) Ratings
Model
Parameter/Condition
Min Max Unit
HBM* VESD All pins
1000
V
Note: * Human Body Model ESD Voltage (HBM, MIL_STD 883 Method 3015.7).
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS device, observe the
same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Latch-Up Immunity
Unlike conventional CMOS devices, UltraCMOS
devices are immune to latch-up.
ELDRS
The UltraCMOS process does not exhibit enhanced
low-dose-rate sensitivity (ELDRS) since bipolar
minority carrier elements are not used.
Document No. DOC-50370-6 │ www.e2v-us.com
©2012–2015 Peregrine Semiconductor Corp. All rights reserved.
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