PE99153DIE Datasheet PDF - Peregrine Semiconductor
| Part Number | PE99153DIE | |
| Description | Hi-Rel 6A DC-DC Converter | |
| Manufacturers | Peregrine Semiconductor | |
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Product Description
The PE99153 DIE is a radiation tolerant point-of-load
buck regulator delivering high efficiency at VIN = 5V and
output currents up to 6A continuous. This single-chip
solution is perfect for Hi-Rel applications and delivers
peak efficiency exceeding 93%. A minimal external
component count and high switching frequency enables
>10 W/in2 standard PCB designs while high efficiency
minimizes thermal concerns. All power switching devices
are integrated on-chip.
Fabricated in Peregrine’s patented UltraCMOS®
technology, the PE99153 offers excellent power
efficiency and intrinsic radiation tolerance.
Table 1. Radiation Performance
TID 100 kRad(Si)
SEL > 90 MeV•cm2/mg
SEB
> 90 MeV•cm2/mg
SET
> 90 MeV•cm2/mg
SEFI
> 90 MeV•cm2/mg
SEGR
> 90 MeV•cm2/mg
SEL, SEB, SEGR, SEU, SEFI: None observed, Au/60 degrees
SET: No events exceeding 30 mV transient observed @ Au,
LET=90, 60 degrees and normal incidence
Figure 1. Typical Application Diagram
Product Specification
PE99153 DIE
Hi-Rel 6A DC-DC Converter
Radiation Tolerant UltraCMOS®
Monolithic Point-of-Load Synchronous
Buck Regulator with Integrated Switches
Features
• Up to 6A continuous
• Output voltage range from 1.0–3.6V by
external select resistors
• Input voltage range 4.6–6.0V
• Current mode control, pulse-by-pulse
current limit, current sharing enabled
and (N+K) redundancy compatible
shutdown mode
• SYNC function, 100 kHz–5 MHz lock
range with selectable 500 kHz / 1 MHz
free running frequency
• Shutdown pin, Power Good output
pin for supply sequencing
• Better than 1% typical initial accuracy
(25°C)
• Control inputs compatible with TTL,
LVTTL, LVCMOS (2.5V and 3.3V)
and 5V CMOS
Document No. DOC-50371-6 │ www.e2v-us.com
©2012–2015 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 15
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PE99153 DIE
Product Specification
Table 3. Pin Coordinates and Descriptions
(continued)
Pin
No.
Pin Name
X
Y
Description
25
TCSEL0 –2343.9
148.5
Bandgap Reference Voltage
Fine Adjust (0)
26
TCSEL1 –2343.9
297.2
Bandgap Reference Voltage
Fine Adjust (0)
27 GND –2343.9 500 Ground
28 CCSEL –2343.9 696.1 Course trim code
29
EAINM
–2343.9
869.7
Error Amplifier (–) Input,
Loop to VREF
30
EAINP
–2343.9
1068.3
Error Amplifier (+) Input,
Load Feedback
1.000V Reference output,
31
VREF
–2343.9
1266.9
Loop to AAINP. Additional
Low Pass Filtering May be
Necessary
32 AGND –2142.8 1283.2 Bandgap ground
33
SScap
–1944.2
1283.2
Resistor to Set Reference
Current
34
SYNC
–1745.6
1283.2
Loop-Through Complement
Output
35
SDb
–1547 1283.2 Shutdown (L)/enable input
36 TEST –1348.4 1283.2 Ground
37 GND –2343.9 1437.25 Ground
38 VIN –397.5 1000 Input Power Supply
39 VIN 1102.5 1000 Input Power Supply
40 VIN 102.5 0 Input Power Supply
41 VIN 1602.5 0 Input Power Supply
42 VIN –397.5 –1000 Input Power Supply
43 VIN 1102.5 –1000 Input Power Supply
Table 4. Operating Ranges
Symbol
Parameter/Condition
VIN Power supply voltage
TA
Operating temperature range
(case)
Min Max
4.6 6.0
Unit
V
–55 +125 oC
Table 5. Absolute Maximum Ratings
Symbol
Parameter/Condition
Min Max Unit
VIN Power supply voltage
–0.5 6.5
V
TJ
Operating temperature range
(junction)
–55 +145 oC
TST Storage temperature range (case) –65 +150 oC
II DC into any signal input
–10 10 mA
IO DC into any signal output
–50 50 mA
IP DC into any single power pin
–2 2
A
Exceeding absolute maximum ratings may cause
permanent damage. Operation between maximum
operating ranges and absolute maximum operating
ranges for extended periods may reduce reliability.
Table 6. Electrostatic Discharge (ESD) Ratings
Model
Parameter/Condition
Min Max Unit
HBM* VESD All pins
1000
V
Note: * Human Body Model ESD Voltage (HBM, MIL_STD 883 Method 3015.7).
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS device, observe the
same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Latch-Up Immunity
Unlike conventional CMOS devices, UltraCMOS
devices are immune to latch-up.
ELDRS
The UltraCMOS process does not exhibit enhanced
low-dose-rate sensitivity (ELDRS) since bipolar
minority carrier elements are not used.
Document No. DOC-50371-6 │ www.e2v-us.com
©2012–2015 Peregrine Semiconductor Corp. All rights reserved.
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