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Aeroflex Circuit Technology - Dual Transceiver

Numéro de référence ACT4480-DFI
Description Dual Transceiver
Fabricant Aeroflex Circuit Technology 
Logo Aeroflex Circuit Technology 





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ACT4480-DFI fiche technique
Standard Products
ACT4480-DFI Dual Transceiver
for H009 Specification
www.aeroflex.com/avionics
February 27, 2013
FEATURES
Dual transceiver meets McDonnell Douglas H009 data bus specifications
Operates with ±12V to ±15 and +5V power supplies
Monolithic construction using linear ASICs
Packaging Low profile ceramic
- 0.60''W x 0.80''L x 0.14''H
Designed for commercial, industrial and aerospace applications
Full MIL-PRF-38534 qualification pending
DESCRIPTION
The Aeroflex Plainview transceiver model ACT4480-DFI is a new generation monolithic transceiver which
provides compliance with H009 data bus requirements using three DC power supplies operation. The
dual channel ACT4480-DFI performs the front-end analog function of inputting and outputting data
through a transformer to a H009 data bus.
Design of these transceivers reflects particular attention to active filter performance. This results in low bit
and word error rate with superior waveform purity and minimal zero crossover distortion. The active filter
design provides the required H009 low harmonic distortion waveform without increasing the pulse delay
characteristics significantly. Efficient transmitter electrical and thermal design provides low internal power
dissipation and heat rise at high and well as low duty cycles. The receiver input threshold is set internally.
TRANSMITTER
The Transmitter section accepts complementary TTL data at the input, and when coupled to the data
bus with a 1:1 transformer, isolated on the transceiver side with two 34 Ohm bus terminating resistors, with
the bus terminated by a 175 Ohm resistor, the data bus signal produced is 20VP-P nominal at A-A' (See
Figure 5). When both DATA and DATA inputs are held low or high, the transmitter output remains a low
impedance and signal is “removed” from the line. In addition, an overriding “INHIBIT" input returns the
output to a high impedance state. A logic “1” applied to the “INHIBIT” takes priority over the condition of
the data inputs and disables the transmitter (See Transmitter Logic Waveforms - Figure 2).
The transmitter utilizes an active filter to suppress harmonics above 1MHz to meet H009 specifications.
The transmitter may be safely operated for an indefinite period at 100% duty cycle into a data bus short
circuit.
RECEIVER
The Receiver section accepts bi-phase differential data at the input and produces two TTL signals at the
output. The outputs are DATA and DATA, and represent positive and negative excursions of the input
beyond a pre-determined threshold (See Receiver Logic Waveforms - Figure 3).
The internal threshold is nominally set to detect data bus signals exceeding 2.0VP-P when used with a
1:1 turns ratio transformer (See Figure 5 for transformer data and typical connection).
A low level at the Strobe input inhibits the DATA and DATA outputs (Pin is internally pulled up).
SCD4480-DFI

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