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PDF UT54ACS00E Data sheet ( Hoja de datos )
| Número de pieza | UT54ACS00E | |
| Descripción | Quadruple 2-Input NAND Gates | |
| Fabricantes | Aeroflex Circuit Technology | |
| Logotipo |  |
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UT54ACS00E
Quadruple 2-Input NAND Gates
April 2015
www.aeroflex.com/Logic
Datasheet
FEATURES
• 0.6μm CRH CMOS process
- Latchup immune
• High speed
• Low power consumption
• Wide power supply operating range from 3.0V to 5.5V
• Available QML Q or V processes
• 14-lead flatpack
• UT54ACS00E - SMD 5962-96512
DESCRIPTION
The UT54ACS00E is a performance and voltage enhanced ver-
sion of the UT54ACS00 quadruple, two-input NAND gate. The
circuit performs the Boolean functions Y = A⋅B or Y = A + B
in positive logic.
The device is characterized over full military temperature range
of -55°C to +125°C.
FUNCTION TABLE
INPUTS
AB
HH
LX
XL
OUTPUT
Y
L
H
H
PINOUT
A1
B1
Y1
A2
B2
Y2
VSS
14-Lead Flatpack
TopView
1 14
2 13
3 12
4 11
5 10
69
78
VDD
B4
A4
Y4
B3
A3
Y3
LOGIC SYMBOL
(1)
A1
(2)
B1
(4)
A2
(5)
B2
(9)
A3
(10)
B3
(12)
A4
(13)
B4
&
(3) Y1
(6) Y2
(8) Y3
(11) Y4
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC
Publication 617-12.
LOGIC DIAGRAM
A1
B1
A2
B2
A3
B3
A4
B4
Y1
Y2
Y3
Y4
36-00-04-005
Ver. 1.0.0
1 Aeroflex Microelectronics Solutions - HiRel
1 page  
Packaging
36-00-04-005
Ver. 1.0.0
1. All exposed metallized areas are gold plated over
electroplated nickel per MIL-PRF-38535.
2. The lid is electrically connected to VSS.
3. Lead finishes are in accordance with MIL-PRF-
38535.
4. Dimension symbol is in accordance with MIL-
PRF-38533.
5. Lead position and colanarity are not measured.
Figure 1. 14 Lead Flatpack
5 Aeroflex Microelectronics Solutions - HiRel
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet UT54ACS00E.PDF ] | |
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