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PDF XRS10L240 Data sheet ( Hoja de datos )
| Número de pieza | XRS10L240 | |
| Descripción | SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR | |
| Fabricantes | Exar Corporation | |
| Logotipo |  |
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EXSTOR - 1 XRS10L240
SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR
JANUARY 2009
REV. 1.05
FEATURES
GENERAL FEATURES
• Six independent 3/1.5Gbps SATA ports.
• Connects 2 host ports to 4 device ports.
• Supports 3/1.5Gbps rate detection/speed
negotiation.
• Supports power down modes - Active, partial,
slumber and power down.
• Advanced features configurable through MDIO
bus.
PORT MULTIPLIER/SELECTOR LOGIC FEATURES
• Low latency architecture.
• Supports OOB signaling for SATA applications.
Internal OOB detectors for COMRESET/
COMINIT and COMWAKE.
I/O FEATURES
• High speed outputs with programmable pre-
emphasis to drive long interconnects.
• Selectable high speed input equalization for
optimum reception.
• Compliant with SATA Gen-2i & Gen-2m
specification.
• Enables reliable data transmission over 1 meter
or more of FR-4 and 4 meters or more of
unequalized copper cable.
• Selectable spread spectrum clocking (SSC) to
reduce EMI.
PHYSICAL FEATURES
• CMOS 0.13 Micron Technology
• Single 1.2 V Power Supply
• -40°C to 85°C Industrial Temperature Range
• No heatsink or airflow required
• 100-Pin LQFP Package
1.0 INTRODUCTION
The XRS10L240 provides the combined advantages
of the Serial ATA II Port Selector and Port Multiplier
implementations for Serial ATA II systems at 3.0
Gbps and 1.5 Gbps. Combining the capability to
address four Serial ATA devices from one external
link with support for a failover path from two
independent hosts, the XRS10L240 offers a leading
solution for propagation of high data rate Serial ATA
products in a wide variety of applications. The
integration of Serial ATA PHY links, a variety of digital
logic capabilities, rate adjust FIFOs, integrated low-
cost clock oscillator support, test and loopback
features is achieved in a low cost and lower power
implementation.
The port selector function is used when dual hosts,
such as I/O controllers, must access single-port disk
drives in high availability storage subsystems where
redundancy and load sharing are important. The
outputs from the I/O controllers are multiplexed to a
Serial ATA drive through the port selector block of the
XRS10L240. Active/passive port selector in
XRS10L240 allows two different host ports to connect
to the same target in order to create a redundant path
to that target. In combination with RAID, the
XRS10L240 allows system providers to build fully
redundant solutions. This avoids the presence of a
single point of failure, and enables a fail-over path in
the case of host failure.
This port multiplier function is used when one active
host has to communicate with multiple SATA drives.
The XRS10L240 supports up to 4 SATA drives and
utilizes the full bandwidth of the host connection.
The XRS10L240 includes enhanced features such as
staggered HDD spin-up, power management control,
hot plug capability and support for legacy software.
The XRS10L240 acts as a retimer, maintaining
independent signaling domains between the drives,
hosts and the external interconnect.
The high-speed serial input feature: selectable
equalization and the high-speed serial output feature:
programmalbe pre-emphasis can be used to
compensate for ISI (Inter-Symbol Interference) and
increase maximum cabling distances.
XRS10L240 meets tight jitter budgets in SATA
applications. Exar's serial I/O technology enables
reliable data transmission over 1 meter or more of
FR-4 and 4 meters or more of unequalized copper
cable.
Host and drive port speeds can be mixed and
matched, based upon inherent data rate negotiation
present in the SATA II specifications.
The MDIO bus allows simple configuration of the
XRS10L240 when needed. Receive equalization,
transmit amplitude and pre-emphasis and SSC
control are all configurable via the 2-wire MDIO
interface.
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com
1 page  
EXSTOR - 1 XRS10L240
REV. 1.05
2.0 PIN DESCRIPTIONS
SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR
TABLE 1: XRS10L240 PIN DESCRIPTIONS
Pin Name
Pin Number
I/O
DESCRIPTION
DATA INTERFACE
SOTP0/SOTN0
SOTP1/SOTN1
SOTP2/SOTN2
68, 69
57, 56
8, 7
CML
AC
O Coupled Serial ATA Output Transmitters. These ports communicate
from the XRS10L240 to downstream devices
SOTP3/SOTN3
19, 20
SORP0/SORN0
65, 66
SORP1/SORN1
SORP2/SORN2
60, 59
11, 10
I
Serial ATA Input Receivers. These ports receive signals
from downstream devices
SORP3/SORN3
16, 17
SITP0/SITN0
SITP1/SITN1
93, 94
82, 81
O
Serial ATA Output Transmitters. These ports communicate
from the XRS10L240 to upstream hosts.
SIRP0/SIRN0
SIRP1/SIRN1
90, 91
85, 84
I
Serial ATA Input Receivers. These ports receive signals
from upstream hosts.
CLOCK INTERFACE
CMU_REFP/
CMU_REFN
46,
47
I CML Reference clock input
AC
Coupled
XOD
43 0 Analog Crystal oscillator output
XOG
44 I Analog Crystal oscillator input, 1.26V max
MDIO INTERFACE SIGNALS
MDC
3 I LVCMOS MDIO clock input, +3.3V LVCMOS
MDIO
5 I/O LVCMOS MDIO data port, +3.3V LVCMOS. Open drain
JTAG Interface Signals
TCK
96 I LVCMOS JTAG test clock, +3.3V LVCMOS
TDI 100 I
JTAG test data in, +3.3V LVCMOS
TDO
99 O
JTAG test data out, +3.3V LVCMOS. Open drain. If used
to daisy chain JTAG devices, pull up externally using
3.3KOhm resistor.
TMS
97 I
JTAG mode select, +3.3V LVCMOS
TRST
1I
JTAG test reset, +3.3V LVCMOS. Pull low externally using
3.3KOhm resistor for normal operation of the device.
GENERAL CONTROL AND CONFIGURATION SIGNALS (CMOS)
RBIAS
49 I Analog Connection point for calibration termination resistor.
RESETB
75 I LVCMOS Active low reset pin, +3.3V LVCMOS.
5
5 Page 
EXSTOR - 1 XRS10L240
REV. 1.05
SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR
3.2 Power Down Modes
The XRS10L240 features independent support for the 3 power modes, as follows:
• Active: All parts of the link are active. All power-down signals are de-asserted.
• Partial: In partial mode, the input and output pipelines are shut down, but the PLL and the OOB generation
circuits are active.
• Slumber: In slumber mode, the PLL is also shut down, saving additional power but adding latency on exit.
The XRS10L240 transceiver components (transmitter, receive CDR, PLL, etc.) can be powered down through
MDIO register settings. Please refer to Table 14, “Powerdown Registers (MDIO Devices 1, 2 & 3),” on
page 29
Please refer to “XRS10L240/140 Errata Sheet” for details regarding Link Power Management.
3.3 Speed Negotiation
The XRS10L240 will automatically perform speed negotiation with the host and devices in order to verify
whether the second generation Serial ATA 3.0 Gbps data rate is available or whether the system will need to
fall back upon the first generation Serial ATA 1.5 Gbps data rate. Speed negotiation is performed on an
independent basis by each of the dual-channel macros. Speed negotiation is done independently on all host
and device ports by default. MDIO configuration can request a common negotiated speed on the host and
device ports if such a speed exists. To perform speed negotiation with a downstream device, the XRS10L240
will first perform a COMRESET/COMINIT handshake with the device and then performs a calibrate/
COMWAKE handshake. Following receipt of the device COMWAKE signal, the XRS10L240 will continually
send out a D10.2 signal while awaiting receipt of the device ALIGN primitive. Depending on the speed of the
ALIGN primitive, the XRS10L240 will be able to determine the PHY generation of the device, and provide the
appropriate 1.5 Gbps or 3.0 Gbps ALIGN primitive in return to the device, thus completing speed negotiation.
This process is outlined in Figure 7.
FIGURE 7. SERIAL ATA SPEED NEGOTIATION
For speed negotiation with an upstream host, after the COMRESET/COMINIT and COMWAKE handshake is
complete, the XRS10L240 will initially send out an ALIGN primitive at the 2nd generation 3.0 Gbps data rate. If
no confirming 3.0 Gbps ALIGN primitive is received from the host, the XRS10L240 will then step down and
attempt negotiation at the lower 1.5 Gbps data rate.
3.4 Port selector Implementation
11
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet XRS10L240.PDF ] | |
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