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PDF HT46RS03 Data sheet ( Hoja de datos )

Número de pieza HT46RS03
Descripción 2K 8-Bit OTP MCU
Fabricantes Holtek Semiconductor 
Logotipo Holtek Semiconductor Logotipo



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HT46RS03/HT46RS03E/HT46RS03P/HT46RS03PE
2K 8-Bit OTP MCU with OPA & Comparator
Technical Document
· Tools Information
· FAQs
· Application Note
- HA0075E MCU Reset and Oscillator Circuits Application Note
Features
· Operating voltage:
fSYS= 4MHz: 2.2V~5.5V
fSYS= 8MHz: 3.3V~5.5V
fSYS= 16MHz: 4.5V~5.5V
· OTP Program Memory: 2K´15 ROM
· RAM Data Memory: 128´8 RAM
· 16 bidirectional I/O lines
· External interrupt input shared with an I/O line
· Single 8-bit programmable Timer/Event Counters
with overflow interrupt and 7-stage prescaler
· Single 16-bit programmable Timer/Event Counter
with overflow interrupt
· External crystal and RC oscillator
· Watchdog Timer function
· PFD for audio frequency generation
· Power down and wake-up functions to reduce power
consumption
· Up to 0.25ms instruction cycle with 16MHz system
clock at VDD= 5V
· 4-level subroutine nesting
· Bit manipulation instruction
· Table read instructions
· 63 powerful instructions
· All instructions executed in one or two machine
cycles
· Low voltage reset function
· Three integrated operational amplifiers
- one with programmable gain control
· Single comparator with interrupt function
· Embedded 5V LDO in HT46RS03P
· 128´8 EEPROM in HT46RS03E or HT46RS03PE
· Range of package types
General Description
These devices are 8-bit, high performance, RISC archi-
tecture microcontroller device specifically designed for
operational amplifier applications that can be used to in-
terface directly to ultrasonic transducers.
The advantages of low power consumption, I/O flexibil-
ity, programmable frequency divider, timer functions,
oscillator options, internal comparator, internal opera-
tional amplifiers, power-down and wake-up functions,
enhance the versatility of these devices to suit a wide
range of application possibilities such as remote control
appliances, car reversing systems, level meters, etc.
EEPROM memory is incorporated into HT46RS03E or
HT46RS03PE device, which is useful for applications
that require an area of non-volatile memory, perhaps to
store information such as calibration parameters, part
numbers etc. Most features are common to all devices,
however, they differ in the provision of an LDO and
EEPROM as well as package types.
Rev. 1.30
1 March 12, 2009

1 page




HT46RS03 pdf
HT46RS03/HT46RS03E/HT46RS03P/HT46RS03PE
Absolute Maximum Ratings
Supply Voltage ...........................VSS-0.3V to VSS+6.0V
Input Voltage..............................VSS-0.3V to VDD+0.3V
IOL Total ..............................................................150mA
Total Power Dissipation .....................................500mW
Storage Temperature ..........................-50°C to +125°C
Operating Temperature.........................-40°C to +85°C
IOH Total............................................................-100mA
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed
in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Ta=25°C
Symbol
Parameter
VDD Operating Voltage
IDD1
Operating Current
(Crystal OSC, RC OSC)
IDD2
IDD3
ISTB1
Operating Current
(Crystal OSC, RC OSC)
Operating Current
(Crystal OSC, RC OSC)
Standby Current
(WDT Enabled)
ISTB2
VIL1
VIH1
VIL2
VIH2
VLVR1
VLVR2
VLVR3
Standby Current
(WDT Disabled)
Input Low Voltage for PA,
TMR0, TMR1 and INT
Input High Voltage for PA,
TMR0, TMR1 and INT
Input Low Voltage (RES)
Input High Voltage (RES)
Low Voltage Reset 1
Low Voltage Reset 2
Low Voltage Reset 3
IOL I/O Port Sink Current
IOH I/O Port Source Current
RPH Pull-high Resistance
VOPA+ 0.5VDD OPAs Bias Voltage
Test Conditions
VDD Conditions
¾ fSYS=4MHz
¾ fSYS=8MHz
¾ fSYS=16MHz
3V
No load, fSYS=4MHz
5V
3V
No load, fSYS=8MHz
5V
5V No load, fSYS=16MHz
3V
No load, system HALT
5V
3V
No load, system HALT
5V
¾¾
Min.
2.2
3.3
4.5
¾
¾
¾
¾
¾
¾
¾
¾
¾
0
Typ. Max. Unit
¾ 5.5 V
¾ 5.5 V
¾ 5.5 V
1 2 mA
2.5 5 mA
2 4 mA
4 8 mA
6 12 mA
¾ 5 mA
¾ 10 mA
¾ 1 mA
¾ 2 mA
¾ 0.3VDD V
¾
¾
0.7VDD
¾
VDD
V
¾¾
0 ¾ 0.4VDD V
¾
¾
0.9VDD
¾
VDD
V
¾ Configuration option: 2.1V
1.98
2.10
2.22
V
¾ Configuration option: 3.15V 2.98
3.15
3.32
V
¾ Configuration option: 4.2V
3.98
4.2
4.42
V
3V
VOL=0.1VDD
5V
4 8 ¾ mA
10 20 ¾ mA
3V
VOH=0.9VDD
5V
-2 -4 ¾ mA
-5 -10 ¾ mA
3V
¾
5V
20 60 100 kW
10 30 50 kW
3V~
5.5V
¾
0.475VDD 0.5VDD 0.525VDD V
Rev. 1.30
5 March 12, 2009

5 Page





HT46RS03 arduino
HT46RS03/HT46RS03E/HT46RS03P/HT46RS03PE
Program Counter
During program execution, the Program Counter is used
to keep track of the address of the next instruction to be
executed. It is automatically incremented by one each
time an instruction is executed except for instructions,
such as ²JMP² or ²CALL² that demand a jump to a
non-consecutive Program Memory address. Note that
the Program Counter width varies with the Program
Memory capacity depending upon which device is se-
lected. However, it must be noted that only the lower 8
bits, known as the Program Counter Low Register, are
directly addressable by the user.
When executing instructions requiring jumps to
non-consecutive addresses such as a jump instruction,
a subroutine call, interrupt or reset, etc., the
microcontroller manages program control by loading the
required address into the Program Counter. For condi-
tional skip instructions, once the condition has been
met, the next instruction, which has already been
fetched during the present instruction execution, is dis-
carded and a dummy cycle takes its place while the cor-
rect instruction is obtained.
The lower byte of the Program Counter, known as the
Program Counter Low register or PCL, is available for
program control and is a readable and writeable regis-
ter. By transferring data directly into this register, a short
program jump can be executed directly, however, as
only this low byte is available for manipulation, the
jumps are limited to the present page of memory, that is
256 locations. When such program jumps are executed
it should also be noted that a dummy cycle will be in-
serted.
The lower byte of the Program Counter is fully accessi-
ble under program control. Manipulating the PCL might
cause program branching, so an extra cycle is needed
to pre-fetch. Further information on the PCL register can
be found in the Special Function Register section.
Stack
This is a special part of the memory which is used to
save the contents of the Program Counter only. The
stack has 4 levels and is neither part of the data nor part
of the program space, and is neither readable nor
writeable. The activated level is indexed by the Stack
Pointer, known as SP, which is also neither readable nor
writeable. At a subroutine call or interrupt acknowledge
signal, the contents of the Program Counter are pushed
onto the stack. At the end of a subroutine or an interrupt
routine, signaled by a return instruction, RET or RETI,
the Program Counter is restored to its previous value
from the stack. After a device reset, the Stack Pointer
will point to the top of the stack.
P ro g ra m C o u n te r
T o p o f S ta c k
S ta c k
P o in te r
B o tto m o f S ta c k
S ta c k L e v e l 1
S ta c k L e v e l 2
S ta c k L e v e l 3
S ta c k L e v e l 4
P ro g ra m
M e m o ry
If the stack is full and an enabled interrupt takes place,
the interrupt request flag will be recorded but the ac-
knowledge signal will be inhibited. When the Stack
Pointer is decremented, by RET or RETI, the interrupt
will be serviced. This feature prevents stack overflow al-
lowing the programmer to use the structure more easily.
However, when the stack is full, a CALL subroutine in-
Mode
Program Counter Bits
b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Initial Reset
00000000000
External Interrupt
00000000100
Timer/Event Counter 0 Overflow 0 0 0 0 0 0 0 1 0 0 0
Timer/Event Counter 1 Overflow 0 0 0 0 0 0 0 1 1 0 0
Comparator Interrupt
00000010000
Skip
Program Counter + 2
Loading PCL
PC10 PC9 PC8 @7 @6 @5 @4 @3 @2 @1 @0
Jump, Call Branch
#10 #9 #8 #7 #6 #5 #4 #3 #2 #1 #0
Return from Subroutine
S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0
Program Counter
Note:
PC10~PC8: Current Program Counter bits
@7~@0: PCL bits
#10~#0: Instruction code address bits
S10~S0: Stack register bits
Rev. 1.30
11 March 12, 2009

11 Page







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