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PDF MP7751 Data sheet ( Hoja de datos )

Número de pieza MP7751
Descripción 2 x 20W Stereo BTL Fix Frequency Class D Audio Amplifier
Fabricantes MPS 
Logotipo MPS Logotipo



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The Future of Analog IC Technology
MP7751
26V, 2x20W Stereo BTL Fix Frequency
Class D Audio Amplifier
DESCRIPTION
MP7751 is an analog input Class D Audio
Amplifier which can drive stereo speakers in
bridge-tied-load configuration. It is one of MPS’
products of fully integrated audio amplifiers
which dramatically reduce solution size by
integrating the following:
240mpower MOSFETs
Startup / Shutdown pop elimination
Short circuit protection circuits
Advanced EMI performance
The MP7751 utilizes a stereo BTL structure
capable of delivering 20W per channel into 8
speakers at 18V power supply. MPS Class D
Audio Amplifiers exhibit the high fidelity of a
Class AB amplifier at high efficiencies.
The MP7751 includes an internal circuit which
allows the system automatic shutdown after the
absence of the audio signal. This feature is
used for energy-using products and for battery
operated applications.
It also has an adjustable power limit function.
The PLIMIT circuit sets a limit on the output
peak-to-peak voltage. The limiting is done by
limiting the duty cycle to fixed maximum value.
This limit can be thought of as a "virtual"
voltage rail which is lower than the supply
connected to PVCC.
The MP7751 is available in TSSOP-28 EP
package.
FEATURES
5V to 26V Operation from a Single Supply
±5A Peak Current Output
Output Power:
9.5W/channel at 12V, 8Load, 10%THD
15W/Channel at 16V, 8Load, 10%THD
20W/Channel at 18V, 8Load, 10%THD
92% Efficiency with 8Load, 10%THD,
1kHz, 12V Supply Voltage
240mpower MOSFETs
Startup / Shutdown pop elimination
Short circuit protection circuits
Advanced EMI performance
All Switches Current limited
Internal Under Voltage Protection
Internal Thermal Protection
TSSOP-28 EP package
Adjustable power limiter
Automatic shutdown with zero input signal
detect
Fault Output Flag
APPLICATIONS
TV
DVD Receiver
Active Speaker
Home Theaters
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
MP7751 Rev. 1.0
5/23/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
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MP7751 pdf
MP7751 – 26V, 2X20W STEREO BTL FIX FREQUENCY CLASS D AUDIO AMPLIFIER
OPERATING SPECIFICATIONS (7)
Circuit of figure 5, VCC = 24V, Gain=20dB, VEN = 5V, RLOAD = 8, TA = +25°C, unless otherwise
noted.
Parameters
Power Output
THD+ Noise
Efficiency
Deadtime
Cross Talk
Noise Floor
Signal-to-noise ratio
Symbol Condition
f = 1kHz, THD+N = 10%, VCC = 24V
f = 1kHz, THD+N = 10%, VCC = 18V
f = 1kHz, THD+N = 10%, VCC = 12V
POUT = 5W, f = 1kHz, VCC = 12V
POUT = 18W, f = 1kHz, VCC = 24V
POUT = 9.5W + 9.5W, THD+N = 10%,
VCC = 12 V, 1kHz, RLOAD = 8
IO=0.5A
VO = 1 Vrms, f = 217Hz
A-Weighted, 22 Hz to 22 kHz
f = 1kHz, THD+N = 1%, A-Weighted
Min Typ Max Units
36
20 W
9.5
0.08 %
0.08 %
92 %
28
-100
120
-96
nS
dB
μV
dB
Power Supply Rejection
VRIPPLE=200mVPP,
Inputs ac-coupled
to AGND
f = 1kHz
f = 217Hz
Note:
7) Operating Specifications are for the IC in Typical Application circuit. Not production tested.
-60 dB
-60 dB
MP7751 Rev. 1.0
5/23/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
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MP7751 arduino
MP7751 – 26V, 2X20W STEREO BTL FIX FREQUENCY CLASS D AUDIO AMPLIFIER
PIN FUNCTIONS
Pin # Name Description
1 EN Enable input. Drive EN high to turn on the Amplifier 1A/1B/2A/2B, low to turn them off.
2
3
4
5
6
7
8
9
10
11
12
13
14
15, 16
17
/FAULT
Fault Output. A low output at FAULT indicates that the IC has detected an over
temperature or over current condition. This output is open drain.
IN1A Positive audio input for channel 1. Biased at 2.5V.
IN1B Negative audio input for channel 1. Biased at 2.5V.
GAIN0 Gain selection bit.
GAIN1 Gain selection bit.
AVCC Internal analog reference, 5.5V, need connect a bypass capacitor from AVCC to AGND.
AGND Analog ground.
VDR
Gate Drive Supply Bypass. VDR powers the internal circuitry, internal MOSFET gate
drive. Bypass VDR to AGND with a 0.1μF to 10μF capacitor.
PLIMIT
Power limit and anti-clipping feature control.
Connect a resistor divider from AVCC to GND to set power limit. Connect directly to
AVCC for no power limit.
IN2B Negative audio input for channel 2. Biased at 2.5V.
IN2A Positive audio input for channel 2. Biased at 2.5V.
InAbsence Open drain output used to report the input signal absence.
Cap_D
Delay Time control for input signal absence report function. This holding time can be
adjusted with external capacitor. Connect this pin to AGND to disable automatic shutdown
with zero signal input function.
PVCC2
Power supply input for channel 2. Bypass PVCC2 to PGND2 with a 1μF X7R capacitor (in
addition to the main bulk capacitor), placed close to the PVCC2 and PGND2 pins.
BST2A
High-side MOSFET bootstrap input for Amplifier 2A. A capacitor from BST2A to SW2A
supplies the gate drive current to the internal high-side MOSFET.
18 SW2A Switched power output for Amplifier 2A (the positive output of channel 2).
19 PGND2 Power ground for Amplifier 2A/2B.
20 SW2B Switched power output for Amplifier 2B (the negative output of channel 2).
21
BST2B
High-side MOSFET bootstrap input for Amplifier 2B. A capacitor from BST2B to SW2B
supplies the gate drive current to the internal high-side MOSFET.
22
BST1B
High-side MOSFET bootstrap input for Amplifier 1B. A capacitor from BST1B to SW1B
supplies the gate drive current to the internal high-side MOSFET.
23 SW1B Switched power output for Amplifier 1B (the negative output of channel 1).
24
25
26
27, 28
PGND1
SW1A
BST1A
PVCC1
Power ground for Amplifier 1A/1B.
Switched power output for Amplifier 1A (the positive output of channel 1).
High-side MOSFET bootstrap input for Amplifier 1A. A capacitor from BST1A to SW1A
supplies the gate drive current to the internal high-side MOSFET.
Power supply input for channel 1. Bypass PVCC1 to PGND1 with a 1μF X7R capacitor (in
addition to the main bulk capacitor), placed close to the PVCC1 and PGND1 pins.
MP7751 Rev. 1.0
5/23/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
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