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PDF LV5237JA Data sheet ( Hoja de datos )

Número de pieza LV5237JA
Descripción 9-channel LED Driver
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No Preview Available ! LV5237JA Hoja de datos, Descripción, Manual

LV5237JA
Advance Information
Bi-CMOS IC
9-channel LED Driver
www.onsemi.com
Overview
The LV5237JA is a 9-channel LED driver IC that is capable of switching
between constant-current output and open drain output. Peak output current is
IO max=100mA. It enables 2-wire/3-wire serial bus control (address
designation) to be set arbitrarily using an external pin. Also possible are
9-channel LED ON/OFF control and the setting of the PWM luminance in
256 steps.
Up to 81 driver ICs can be connected using the slave address setting pins.
Function
SSOP24 (225mil)
9-channel output constant-current LED driver/open drain
output LED driver (selected by using an external pin)
Supports separate ON/OFF setting for each LED output,
high withstand voltage (VOUT<42V)
In the constant-current mode (OUTSCT: L), the reference
current is set by the value of resistor connected to the
external pin (RT1).
Built-in D/A (5 bits) for switching current level
… 0.86mA to 31.24mA (RGB drive)
Constant current (IO max=100mA) for full-color
LEDs 9 channels
In the open drain mode (OUTSCT: H), high current drive
(IO max=100mA) 9 channels
In the constant-current mode (OUTSCT: M)
Only RGB3 is open drain (IO max=100mA)
Luminance adjustment using internal PWM control (256 steps), It copes with independent PWM control for each
LED output
8-bit PWM luminance dimming (0% to 99.6%)
3-phase PWM
Selection of 2-wire/ 3-wire serial bus control signals enabled (switching using an external pin)
Schmitt trigger input (3.3V/5V)
Slave addressing (4 bits, connection of up to 81 driver ICs possible)
Input Power supply supports 12V
Internal reference output terminal (5V)
Low current consumption
Output malfunction protection circuits (thermal protection function, UVLO detection protection function, Power
on RESET)
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
ORDERING INFORMATION
See detailed ordering and shipping information on page 23 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
November 2014 - Rev. P0
1
Publication Order Number :
LV5237JA/D

1 page




LV5237JA pdf
LV5237JA
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
-40
-20
Pdmax-Ta
Specif iedbord:114.3x76.1x1.6 mm 3
glass expoxy
1.22
0.52
0 20 40 60
bient temperature, Ta- C
80 100 120
Block Diagram
[Warning] : The VLED terminal becomes the terminal for protection of the LED drive output. Please be connected to the power supply same as LED drive.
When IC power supply (SVCC) and power supply of the LED or two kinds of power supply is more than it, please connect VLED to the highest
potential and the power supply that it is.
www.onsemi.com
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LV5237JA arduino
LV5237JA
3) 2-wire serial bus transfer formats
LV5237JA receives the command by communication format by 2 line type serial communication of SCLK,
SDATA.
When SCLK stops in “L” level
When SCLK stops in “H” level
Data length : 37bits
Start condition (“111111111”) + BLANK (“0”) + Slave address (8bit) + BLANK + (“0”) +
Resister address (8bit) + BLANK (“0”) + Data (8bit) + BLANK (“0”)
Clock frequency : 5MHz or less
After start detection, it takes SDATA in the timing when the 27th clock track of SCLK stands up when sign according
to communication format is input into SCLK and SDATA.
Note: When SCLK is less than 27th clock track, and BLANK is different from communication format such as “1”, after
start detection, do not take in SDATA.
When SCLK is higher than 28th clock track, start detection is confirmed, or it is automatic, and register address is
incremented every 1byte (8bit) + BLANK (“0”) unless BLANL is “1”.
Data organization
bit ST8 ST7 ST6 ST5 ST4 ST3 ST2 ST1 ST0 BL SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 BL A7 A6 A5 A4 A3 A2 A1 A0 BL D7 D6 D5 D4 D3 D2 D1 D0 BL
SDATA 1 1 1 1 1 1 1 1 1 0 0 0
-0
0
0
Parameter
Start condition
BBB
LLL
A
Slave address
A
Register address
A
NNN
KKK
B
L
Data A
N
K
Even if SCLK and SDATA are state such as among standby or serial data inward correspondences, “111111111” start
assumption and BLANK”0” start the uptake atomic act of new serial data after detection (start detection) was
considered to be it.
After start detection, the first single byte (8bit) is assigned to slave address, and a write store of the slave address
completes it in BLANK”0”.
The next single byte appoints register address in the serial manufacturing auto protocol, and a write of the register
address is completed in BLANK”0”.
The third byte performs a data transfer to the address which it appointed in the register address which it wrote in at the
second byte and it complete data transfer in BLANK”0” and write in it. When data continues after this, register address
is automatically incremented after the fourth byte and a data transfer is completed each time and, in BLANK”0”, writes
in it.
Data Forward continuous from designated register address is enabled, but, as for the redirecting address of the next byte,
it is in this way with for “00h” when register address becomes “0fh”.
In addition, when serial data uptake BLANK is “1”, including slave address selection and register address assignment,
the single byte data just before it is ignored without being written in, and the subsequent data is ignored until it is
detected a start.
www.onsemi.com
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