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PDF STL7N80K5 Data sheet ( Hoja de datos )
| Número de pieza | STL7N80K5 | |
| Descripción | N-channel Power MOSFET | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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STL7N80K5
N-channel 800 V, 0.95 Ω typ., 3.6 A Zener-protected SuperMESH™ 5
Power MOSFET in a PowerFLAT™ 5x6 VHV package
Datasheet − production data
1
2
3
4
PowerFLAT™ 5x6 VHV
Features
Order code
STL7N80K5
VDS
800 V
RDS(on)max.
1.2 Ω
ID
3.6 A
• Outstanding RDS(on)*area
• Worldwide best FOM (figure of merit)
• Ultra low gate charge
• 100% avalanche tested
• Zener protected
Figure 1. Internal schematic diagram
D(5, 6, 7, 8)
8 76 5
G(4)
S(1, 2, 3)
12 34
Top View
AM15540v1
Applications
• Switching applications
Description
This N-channel Zener-protected Power MOSFET
is designed using ST's revolutionary avalanche-
rugged very high voltage SuperMESH™ 5
technology, based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance, and ultra-low gate
charge for applications which require superior
power density and high efficiency.
Order code
STL7N80K5
Table 1. Device summary
Marking
Package
7N80K5
PowerFLAT™ 5x6 VHV
Packaging
Tape and reel
November 2013
This is information on a product in full production.
DocID025551 Rev 1
1/17
www.st.com
1 page  
STL7N80K5
Electrical characteristics
Symbol
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
VDD = 400 V, ID = 3 A,
RG = 4.7 W, VGS = 10 V
(see Figure 15),
(see Figure 20)
Min. Typ. Max Unit
- 11.3 - ns
- 8.3 - ns
- 23.7 - ns
- 20.2 - ns
Table 7. Source drain diode
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
ISD Source-drain current
- 3.6 A
ISDM
VSD(1)
Source-drain current (pulsed)
Forward on voltage
ISD = 6 A, VGS = 0
- 14 A
- 1.5 V
trr Reverse recovery time
- 315
Qrr Reverse recovery charge
ISD = 6 A, di/dt = 100 A/µs
VDD = 60 V (see Figure 17)
-
2.8
IRRM Reverse recovery current
- 17.5
ns
µC
A
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 6 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
(see Figure 17)
- 480
- 3.8
- 16
ns
µC
A
1. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Table 8. Gate-source Zener diode
Symbol
Parameter
Test conditions
Min Typ. Max Unit
V(BR)GSO Gate-source breakdown voltage IGS= ± 1mA, ID=0
30 - - V
The built-in back-to-back Zener diodes have been specifically designed to enhance not only
the device's ESD capability, but also to make them capable of safely absorbing any voltage
transients that may occasionally be applied from gate to source. In this respect, the Zener
voltage is appropriate to achieve efficient and cost-effective protection of device integrity.
The integrated Zener diodes thus eliminate the need for external components.
DocID025551 Rev 1
5/17
17
5 Page 
STL7N80K5
Package mechanical data
Table 9. PowerFLAT™ 5x6 VHV mechanical data
mm.
DIM
min. typ. max.
A 0.80
1.00
A1 0.02
0.05
A2 0.25
b 0.30
0.50
D 5.00 5.20 5.40
E 5.95 6.15 6.35
D2 4.30 4.40 4.50
E2 2.40 2.50 2.60
e 1.27
L 0.50 0.55 0.60
K 2.60 2.70 2.80
aaa 0.15
bbb 0.15
ccc 0.10
eee 0.10
DocID025551 Rev 1
11/17
17
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet STL7N80K5.PDF ] | |
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