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PDF ADR550 Data sheet ( Hoja de datos )

Número de pieza ADR550
Descripción High Precision Shunt Mode Voltage References
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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FEATURES
Ultracompact SC70 and SOT-23-3 packages
Temperature coefficient: 40 ppm/°C (maximum)
2× the temperature coefficient improvement over the
LM4040
Pin compatible with the LM4040/LM4050
Initial accuracy: ±0.2%
Low output voltage noise: 18 μV p-p @ 2.5 V output
No external capacitor required
Operating current range: 50 μA to 15 mA
Industrial temperature range: −40°C to +85°C
APPLICATIONS
Portable, battery-powered equipment
Automotive
Power supplies
Data acquisition systems
Instrumentation and process control
Energy measurement
Table 1. Selection Guide
Part
ADR525A
ADR525B
ADR530A
ADR530B
ADR550A
ADR550B
Voltage (V)
2.5
2.5
3.0
3.0
5.0
5.0
Initial
Accuracy (%)
±0.4
±0.2
±0.4
±0.2
±0.4
±0.2
Temperature
Coefficient
(ppm/°C)
70
40
70
40
70
40
High Precision Shunt Mode
Voltage References
ADR525/ADR530/ADR550
PIN CONFIGURATION
V+ 1
ADR525/
ADR530/
ADR550
3 TRIM
V– 2
Figure 1. 3-Lead SC70 (KS) and 3-Lead SOT-23-3 (RT)
GENERAL DESCRIPTION
Designed for space-critical applications, the ADR525/ADR530/
ADR550 are high precision shunt voltage references, housed in
ultrasmall SC70 and SOT-23-3 packages. These references feature
low temperature drift of 40 ppm/°C, an initial accuracy of better
than ±0.2%, and ultralow output noise of 18 μV p-p.
Available in output voltages of 2.5 V, 3.0 V, and 5.0 V, the
advanced design of the ADR525/ADR530/ADR550 eliminates
the need for compensation by an external capacitor, yet the
references are stable with any capacitive load. The minimum
operating current increases from a mere 50 μA to a maximum
of 15 mA. This low operating current and ease of use make
these references ideally suited for handheld, battery-powered
applications.
A trim terminal is available on the ADR525/ADR530/ADR550
to allow adjustment of the output voltage over a ±0.5% range,
without affecting the temperature coefficient of the device. This
feature provides users with the flexibility to trim out small
system errors.
For better initial accuracy and wider temperature range, see the
ADR5040/ADR5041/ADR5043/ADR5044/ADR5045 family at
www.analog.com.
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2003–2010 Analog Devices, Inc. All rights reserved.

1 page




ADR550 pdf
ABSOLUTE MAXIMUM RATINGS
Ratings apply at 25°C, unless otherwise noted.
Table 5.
Parameter
Reverse Current
Forward Current
Storage Temperature Range
Industrial Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
Rating
25 mA
20 mA
−65°C to +150°C
−40°C to +85°C
−65°C to +150°C
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ADR525/ADR530/ADR550
THERMAL RESISTANCE
Table 6.
Package Type
3-Lead SC70 (KS)
3-Lead SOT-23-3 (RT)
θJA1
580.5
270
θJC
177.4
102
Unit
°C/W
°C/W
1 θJA is specified for worst-case conditions, such as for devices soldered on
circuit boards for surface-mount packages.
ESD CAUTION
Rev. F | Page 5 of 12

5 Page





ADR550 arduino
ADR525/ADR530/ADR550
OUTLINE DIMENSIONS
1.35
1.25
1.15
2.20
2.00
1.80
3
12
2.40
2.10
1.80
0.65 BSC
1.00 1.10 0.40
0.80 0.80 0.10
0.10 MAX
COPLANARITY
0.10
0.40
0.25
SEATING
PLANE
0.26
0.10
0.30
0.20
0.10
ALL DIMENSIONS COMPLIANT WITH EIAJ SC70
Figure 21. 3-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-3)
Dimensions shown in millimeters
3.04
2.90
2.80
1.40
1.30
1.20 3 2.64
2.10
12
0.60
0.45
1.02
0.95
0.88
0.100
0.013
SEATING
PLANE
2.05
1.78
1.03
0.89
1.12
0.89
0.51
0.37
GAUGE
PLANE
0.180
0.085
0.25
0.54
REF
0.60 MAX
0.30 MIN
COMPLIANT TO JEDEC STANDARDS TO-236-AB
Figure 22. 3-Lead Small Outline Transistor Package [SOT-23-3]
(RT-3)
Dimensions shown in millimeters
Rev. F | Page 11 of 12

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