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PDF LTC3676 Data sheet ( Hoja de datos )
| Número de pieza | LTC3676 | |
| Descripción | Power Management Solution | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LTC3676 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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Features
n Quad I2C Adjustable High Efficiency Step Down
DC/DC Converters: 2.5A, 2.5A, 1.5A, 1.5A
n Three 300mA LDO Regulators (Two Adjustable)
n DDR Power Solution with VTT and VTTR Reference
n Pushbutton ON/OFF Control with System Reset
n Independent Enable Pin-Strap or I2C Sequencing
n Programmable Autonomous Power-Down Control
n Dynamic Voltage Scaling
n Power Good and Reset Functions
n Selectable 2.25MHz or 1.12MHz Switching Frequency
n Always Alive 25mA LDO Regulator
n 12µA Standby Current
n Low Profile 40-Lead 6mm 6mm QFN and 48-Lead
Exposed Pad LQFP
Applications
n Supports Freescale i.MX6, ARM Cortex, and Other
Application Processors
n Handheld Instruments and Scanners
n Portable Industrial and Medical Devices
n Automotive Infotainment
n High End Consumer Devices
n Multi-Rail Systems
LTC3676/LTC3676-1
Power Management Solution
for Application Processors
Description
The LTC®3676 is a complete power management solution
for advanced portable application processor-based sys-
tems. The device contains four synchronous step-down
DC/DC converters for core, memory, I/O, and system
on-chip (SoC) rails and three 300mA LDO regulators for
low noise analog supplies. The LTC3676-1 has a ±1.5A
buck regulator configured to support DDR termination
plus a VTTR reference output. An I2C serial port is used
to control regulator enables, power-down sequencing,
output voltage levels, dynamic voltage scaling, operating
modes and status reporting.
Regulator start-up is sequenced by connecting outputs to
enable pins in the desired order or via the I2C port. System
power-on, power-off and reset functions are controlled by
pushbutton interface, pin inputs, or I2C.
The LTC3676 supports i.MX, PXA and OMAP processors
with eight independent rails at appropriate power levels.
Other features include interface signals such as the VSTB
pin that toggles between programmed run and standby
output voltages on up to four rails simultaneously. The
device is available in a 40-lead 6mm 6mm QFN and
48‑lead exposed pad LQFP packages.
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
Typical Application
VIN
2.7V TO 5.5V
Start-Up Sequence
VRTC
3V
25mA
VDD(HIGH)
2.97V
300mA
VLDO3
1.8V
300mA
3V
300mA
VIN
LDO1
SW3
1µF
LTC3676-1
LDO2
1µF
SW2
1.5µH
1.5µH
LDO3
1µF
1.5µH
SW4
LDO4
1µF
1.5µH
SW1
6
ENABLES VTTR
PWR_ON WAKE
ON PGOOD
GND I2C
2
3676 TA01a
VARM
1.38V
47µF 2.5A
VSOC
1.38V
47µF 1.5A
VDDR (VDDQ)
1.5V
47µF 2.5A
VTT
1/2 VDDQ
47µF 1.5A
VTTR (1/2 VDDQ)
WAKE
TO µPROCESSOR
5V/DIV
1V/DIV
1V/DIV
WAKE
VDD(HIGH)
VLDO3
VARM AND VSOC
VDDR
VTT AND VTTR
1ms/DIV
3676 TA01b
For more information www.linear.com/LTC3676
3676fd
1
1 page  
LTC3676/LTC3676-1
E lectrical Characteristics The l denotes the specifications which apply over the specified operating
junction
VIN_L4 =
DteVmDpDe=ra3t.u8rVe.rAanllgree,goutlhaetorwrsisdeissapbelecidfiucantlieosnssoathreerawt iTsAe
= 25°C
noted.
(Note
2).
VIN
=
PVIN1
=
PVIN2
=
PVIN3
=
PVIN4
=
VIN_L2
=
VIN_L3
=
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Available Output Current
l 25
mA
Short-Circuit Output Current Limit
65 100 mA
Dropout Voltage (Note 4)
Feedback Pin Input Current
LDO Regulator 2
ILDO1 = 25mA, VLDO1 = 3.3V
VFB_L1 = 850mV
–0.05
200
280 mV
0.05 µA
VIN_L2 Input Voltage
LDO2 Output Voltage Range
Available Output Current
ILDO2 = 1mA
l 1.7
VFB_L2
l 300
VIN
VIN_L2
V
V
mA
VVIINN__LL22
Quiescent
Shutdown
Current
Current
VIN Quiescent Current
Feedback Regulation Voltage (VFB_L2)
Line Regulation
Load Regulation
Short-Circuit Current Limit
Regulator
Regulator
Enabled,
Disabled
ILDO2
=
0A
Regulator Enabled
ILDO2 =1mA, VIN = 2.7V to 5.5V
ILDO2 = 1mA to 300mA
l
l
l
l 0.707
12
0
50
0.725
0.01
0.01
25
1
85
0.743
770
µA
µA
µA
V
%/V
%
mA
Dropout Voltage (Note 4)
Feedback Pin Input Current
LDO Regulator 3
ILDO2 = 300mA, VLDO2 = 2.5V
ILDO2 = 300mA, VLDO2 = 1.2V
VFB_L2 = 725mV
–0.05
210
450
260 mV
615 mV
0.05 µA
VIN_L3 Input Voltage
Output Voltage
Available Output Current
VIN_L3 = VIN, ILDO3 = 1mA
l 2.35
VIN
l 1.746 1.8 1.854
V
V
l 300
mA
VIN_L3 Quiescent Current
VIN_L3 Shutdown Current
VIN Quiescent Current
Line Regulation
Load Regulation
Short-Circuit Current Limit
Regulator Enabled, ILDO3 = 0A
Regulator Disabled
Regulator Enabled
ILDO3 =1mA, VIN = 2.7V to 5.5V
ILDO3 = 1mA to 300mA
l
l
l
14 25 µA
0 1 µA
50 85 µA
0.01 %/V
0.05 %
770 mA
Dropout Voltage (Note 4)
LDO Regulator 4
ILDO3 = 300mA, VLDO3 = 1.8V
280 350 mV
VIN_L4 Input Voltage
LDO4 Output Voltage Range (LTC3676)
Feedback Regulation Voltage (LTC3676) (VFB_L4)
Output Voltage (LTC3676-1)
ILDO4 = 1mA
LILDDOO4B[=41:3m] A=,0L1DOB[4:3] = 00
LDOB[4:3] = 10
LDOB[4:3] = 11
l 1.7
VFB_L4
l 0.707
l 1.164
l 2.425
l 2.716
l 2.91
0.725
1.2
2.5
2.8
3.0
VIN
VIN_L4
0.743
1.236
2.575
2.884
3.09
V
V
V
V
V
V
V
Available Output Current
l 300
mA
VIN_L4 Quiescent Current
VIN_L4 Shutdown Current
VIN Quiescent Current
Line Regulation
Regulator Enabled, ILDO4 = 0A
Regulator Disabled
Regulator Enabled
ILDO4 =1mA, VIN = 2.7V to 5.5V
l
l
l
12 25 µA
0 1 µA
50 85 µA
0.01 %/V
For more information www.linear.com/LTC3676
3676fd
5
5 Page 
LTC3676/LTC3676-1
Pin Functions (QFN/LQFP)
FB_L2 (Pin 1/Pin 2): Feedback Input for LDO2. Set full-
scale output voltage using a resistor divider connected
from LDO2 to this pin to ground.
SW4 (Pin 11/Pin 14): Switch Pin for Step-Down Switch-
ing Regulator 4. Connect one side of step-down switching
regulator 4 inductor to this pin.
VIN_L2 (Pin 2/Pin 3): Power Input for LDO2. This pin
should be bypassed to ground with a 1μF or greater
ceramic capacitor.Voltage on VIN_L2 should not exceed
voltage on VIN pin.
LDO2 (Pin 3/Pin 4): Output Voltage of LDO2. Nominal
output voltage is set with a resistor feedback divider that
servos to a fixed 725mV reference. This pin must be by-
passed to ground with a 1µF or greater ceramic capacitor.
LDO3 (Pin 4/Pin 5): Output Voltage of LDO3. Nominal
output voltage is a fixed 1.8V. This pin must be bypassed
to ground with a 1µF or greater ceramic capacitor.
VIN_L3 (Pin 5/Pin 6): Power Input for LDO3. This pin
should be bypassed to ground with a 1µF or greater
ceramic capacitor.Voltage on VIN_L3 should not exceed
voltage on VIN pin.
LDO4 (Pin 6/Pin 7): Output Voltage of LDO4. Nominal
output voltage is set with a resistor feedback divider that
servos to a fixed 725mV reference. This pin must be by-
passed to ground with a 1µF or greater ceramic capacitor.
VIN_L4 (Pin 7/Pin 8): Power Input for LDO4. This pin
should be bypassed to ground with a 1μF or greater
ceramic capacitor.Voltage on VIN_L4 should not exceed
voltage on VIN pin.
FB_L4 (Pin 8/Pin 9): Feedback Input for LTC3676 LDO4.
Set full-scale output voltage using a resistor divider con-
nected from LDO4 to this pin to ground.
DThViDsDp(inPisnet1s2t/hPeinlo1g5ic):rSefueprpenlycVeoleltvaegleoffoSrCI2LCanSderSiaDl APoI2rCt.
pins. DVDD resets I2C registers to power-on state when
driven to <1V. SCL and SDA logic levels are scaled to
DVDD. Connect a 0.1µF decoupling capacitor from this
pin to ground.
SDA (Pin 13/Pin 16): Data Pin for the I2C Serial Port. The
I2C logic levels are scaled with respect to DVDD.
SCL (Pin 14/Pin 17): Clock Pin for the I2C Serial Port. The
I2C logic levels are scaled with respect to DVDD.
PVIN4 (Pin 15/Pin 18): Power Input for Step-Down Switch-
ing Regulator 4. Tie this pin to VIN supply. This pin should
be bypassed to ground with a 10μF or greater ceramic
capacitor.
PVIN3 (Pin 16/Pin 19): Power Input for Step-Down Switch-
ing Regulator 3. Tie this pin to the VIN supply. This pin
should be bypassed to ground with a 10μF or greater
ceramic capacitor.
EN_B4 (Pin 17/Pin 20): Enable Step-Down Switching
Regulator 4. Active high input enables step-down switching
regulator 4. A weak pull-down pulls EN_B4 low when left
floating.
EN_B3 (Pin 18//Pin 21): Enable Step-Down Switching
Regulator 3. Active high input enables step-down switching
regulator 3. A weak pull-down pulls EN_B3 low when left
floating.
VDDQIN (Pin 8/Pin 9): VDD Sense Input for LTC3676-1.
Tie DDR memory VDD supply to this pin.
EN_L4 (Pin 9/Pin 10): Enable LDO4 Input for LTC3676.
Active high enables LDO4. A weak pull-down pulls EN_L4
low when left floating.
VTTR (Pin 9/Pin 10): DDR VREF Output Pin for LTC3676‑1.
Buffered reference equal to one-half VDDQIN voltage on
Pin 8.
EN_L3 (Pin 10/Pin 11): Enable LDO3 Input. Active high
enables LDO3. A weak pull-down pulls EN_L3 low when
left floating.
VSTB (Pin 19/Pin 22): Voltage Standby. When VSTB is
low, the DAC registers are selected by command register
bit DVBxA[5]. When VSTB is high, the DAC registers are
forced to DVBxB registers. Tie VSTB to ground if unused.
SW3 (Pin 20/Pin 23): Switch Pin for Step-Down Switch-
ing Regulator 3. Connect one side of step-down switching
regulator 3 inductor to this pin.
PWR_ON(Pin21/Pin26): External Power On. Handshaking
pin to acknowledge successful power-on sequence.
PWR_ON must be driven high within five seconds of
WAKE going high to keep power on. PWR_ON can be
3676fd
For more information www.linear.com/LTC3676
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LTC3676.PDF ] | |
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