|
|
PDF MAX11108 Data sheet ( Hoja de datos )
| Número de pieza | MAX11108 | |
| Descripción | Serial 12-Bit ADC | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de MAX11108 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
|
No Preview Available !
MAX11108
EVALUATION KIT AVAILABLE
Tiny, 2.1mm x 1.6mm, 3Msps,
Low-Power, Serial 12-Bit ADC
General Description
The MAX11108 is a tiny (2.1mm x 1.6mm), 12-bit, com-
pact, high-speed, low-power, successive approximation
analog-to-digital converter (ADC). This high-performance
ADC includes a high-dynamic range sample-and-hold
and a high-speed serial interface. This ADC accepts a
full-scale input from 0V to the power supply or to the ref-
erence voltage.
The MAX11108 features a single-ended analog input
connected to the ADC core. The device also includes a
separate supply input for data interface and a dedicated
input for reference voltage.
The MAX11108 "communicates" from 1.5V to VDD and
operates from a 2.2V to 3.6V supply. The device con-
sumes only 6.6mW at 3Msps and includes full power-
down mode and fast wake-up for optimal power man-
agement and a high-speed 3-wire serial interface. The
3-wire serial interface directly connects to SPI/QSPI™/
MICROWIRE® devices without external logic.
Excellent dynamic performance, low voltage, low power,
ease of use, and extremely small package size make this
converter ideal for portable battery-powered data-acquisi-
tion applications, and for other applications that demand
low-power consumption and minimal space.
The MAX11108 is available in an ultra-TQFN (2.1mm x
1.6mm) package, and operates over the -40°C to +125°C
temperature range.
Applications
●● Instrument Data Acquisition
●● Mobile
●● Portable Data Logging
●● Medical Instrumentation
●● Battery-Operated Systems
●● Communication Systems
Benefits and Features
●● Compact ADC Saves Space
• Single-Ended Analog Input 12-Bit Resolution ADC
• 3Msps Conversion Rate with No Pipeline Delay
• 73dB SNR
• 10-Pin, Ultra-TQFN (μDFN), 2.1mm x 1.6mm
Package
●● Low Power Consumption Extends Battery Life
• 6.6mW at 3Msps
• Very Low Power Consumption at 2.5μA/ksps
• 1.3μA Power-Down Current
• 2.2V to 3.6V Supply Voltage
●● Variable I/O Voltage Range of 1.5V to 3.6V Eases
Interface to Microcontrollers
●● SPI-/QSPI-/MICROWIRE-Compatible Serial Interface
Directly Connects to 1.5V, 1.8V, 2.5V, or 3V Digital
System
Functional Diagram
VOVDD VDD
CS
SCLK
CONTROL MAX11108
LOGIC
SAR
OUTPUT
BUFFER
DOUT
AIN CDAC
QSPI is a trademark of Motorola, Inc.
MICROWIRE is a registered trademark of National
Semiconductor Corp.
µMAX is a registered trademark of Maxim Integrated Products, Inc.
VREF
AGND
19-6227; Rev 3; 3/15
1 page  
MAX11108
Tiny, 2.1mm x 1.6mm, 3Msps,
Low-Power, Serial 12-Bit ADC
SAMPLE
SAMPLE
CS
t2
t6 t5
t1
SCLK
16 1
2345
6 7 8 9 10 11 12 13 14 15 16 1
DOUT
HIGH
IMPEDANCE
0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0
(MSB)
0 HIGH
IMPEDANCE
t3 t4 t7
tCONVERT
1/fSAMPLE
tACQ
t8 tQUIET
Figure 1. Interface Signals for Maximum Throughput
SCLK
t4
SCLK
t7
DOUT
OLD DATA
NEW DATA
VIH
VIL
VIH
DOUT
VIL
OLD DATA
NEW DATA
Figure 2. Setup Time After SCLK Falling Edge
Figure 3. Hold Time After SCLK Falling Edge
SCLK
t8
DOUT
Figure 4. SCLK Falling Edge DOUT Three-State
HIGH IMPEDANCE
www.maximintegrated.com
Maxim Integrated │ 5
5 Page 
MAX11108
Tiny, 2.1mm x 1.6mm, 3Msps,
Low-Power, Serial 12-Bit ADC
PULL CS HIGH AFTER THE 2ND AND BEFORE THE 10TH SCLK FALLING EDGE
CS
SCLK
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
DOUT
HIGH
IMPEDANCE
INVALID
DATA
INVALID DATA OR HIGH IMPEDANCE
Figure 7. Entering Power-Down Mode
HIGH IMPEDANCE
CS
SCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
DOUT
HIGH
IMPEDANCE
INVALID DATA (DUMMY CONVERSION)
Figure 8. Exiting Power-Down Mode
HIGH
IMPEDANCE
VALID DATA
HIGH
IMPEDANCE
OUTPUT CODE
111...111
111...110
111...101
FS - 1.5 x LSB
000...010
000...001
000...000
0123
0.5 x LSB
2n-2 2n-1 2n
ANALOG
INPUT (LSB)
FULL SCALE (FS):
AIN = VREF
n = RESOLUTION
Figure 9. ADC Transfer Function
Exiting Power-Down Mode
To exit power-down mode, implement one dummy conver-
sion by driving CS low for at least 10 clock cycles (see
Figure 8). The data on DOUT is invalid during this dummy
conversion. The first conversion following the dummy
cycle contains a valid conversion result.
The power-up time equals the duration of the dummy
cycle, and is dependent on the clock frequency. The pow-
er-up time for 3Msps operation (48MHz SCLK) is 333ns.
Supply Current vs. Sampling Rate
For applications requiring lower throughput rates, the
user can reduce the clock frequency (fSCLK) to lower the
sample rate. Figure 10 shows the typical supply current
(IVDD) as a function of sample rate (fS). The part operates
in normal mode and is never powered down.
The user can also power down the ADC between conver-
sions by using the power-down mode. Figure 11 shows
that as the sample rate is reduced, the device remains in
the power-down state longer and the average supply cur-
rent (IVDD) drops accordingly.
www.maximintegrated.com
Maxim Integrated │ 11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet MAX11108.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| MAX1110 | Serial 8-Bit ADCs | Maxim Integrated |
| MAX11100 | 200ksps ADC | Maxim Integrated |
| MAX11101 | 200ksps ADC | Maxim Integrated |
| MAX11102 | Serial 12-/10-/8-Bit ADCs |  Maxim Integrated Products |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |