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PDF ATF22V10B Data sheet ( Hoja de datos )
| Número de pieza | ATF22V10B | |
| Descripción | High-performance Electrically Erasable Programmable Logic Device | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Industry Standard Architecture
– Low-cost Easy-to-use Software Tools
• High-speed, Electrically Erasable Programmable Logic Devices
• CMOS and TTL Compatible Inputs and Outputs
– Input and I/O Pull-up Resistors
• Advanced Flash Technology
– Reprogrammable
– 100% Tested
• High-reliability CMOS Process
– 20 year Data Retention
– 100 Erase/Write Cycles
– 2,000V ESD Protection
– 200mA Latchup Immunity
• Full Military Temperature Ranges
• Dual-in-line and Surface Mount Packages in Standard Pinouts
• PCI Compliant
Figure 0-1. Logic Diagram
Figure 0-2. Pin Configurations
All Pinouts Top View
Pin Name
CLK
IN
I/O
*
VCC
Function
Clock
Logic Inputs
Bidirectional Buffers
No Internal Connection
+5V Supply
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
TSSOP
1 24
2 23
3 22
4 21
5 20
6 19
7 18
8 17
9 16
10 15
11 14
12 13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
DIP/SOIC
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
24 VCC
23 I/O
22 I/O
21 I/O
20 I/O
19 I/O
18 I/O
17 I/O
16 I/O
15 I/O
14 I/O
13 IN
LCC/PLCC
IN 5
IN 6
IN 7
*8
IN 9
IN 10
IN 11
25 I/O
24 I/O
23 I/O
22 *
21 I/O
20 I/O
19 I/O
High-performance
Electrically
Erasable
Programmable
Logic Device
Atmel ATF22V10B
0250M–PLD–7/10
1 page  
6. Input Test Waveforms and Measurement Levels
Atmel ATF22V10B
tR, tF < 3ns
7. Output Test Loads
Commercial
Military
* All except -7 which is R2 = 300
8. Pin Capacitance
f = 1MHz, T = 25°C(1)
Typ Max
Units
Conditions
CIN
COUT
Note:
58
pF VIN = 0V
68
pF VOUT = 0V
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested
9. Power-up Reset
The registers in the Atmel® ATF22V10B are designed to reset during power-up. At a point delayed slightly from
VCC crossing VRST, all registers will be reset to the low state. The output state will depend on the polarity of the out-
put buffer.
This feature is critical for state machine initialization. However, due to the asynchronous nature of reset and the
uncertainty of how VCC actually rises in the system, the following conditions are required:
1. The VCC rise must be monotonic
2. After reset occurs, all input and feedback setup times must be met before driving the clock pin high
3. The clock must remain stable during tPR
0250M–PLD–7/10
5
5 Page 
Atmel ATF22V10B
0250M–PLD–7/10
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet ATF22V10B.PDF ] | |
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