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PDF LT3744 Data sheet ( Hoja de datos )
| Número de pieza | LT3744 | |
| Descripción | High Current Synchronous Step-Down LED Driver | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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Features
n Ideal for Driving Up to 40A LEDs
n Up to 3000:1 PWM Dimming
n 20:1 Analog Dimming
n ±3% Current Regulation Accuracy
n ±3% Voltage Regulation Accuracy
n Unique Inverting Buck-Boost Topology Allows
Grounded Heat Sink to Be Used for RGB LEDs
n 3.3V to 36V Input Voltage Range
n Peak Current Mode with DC LED Current Sensing
n Open and Shorted LED Protection and Fault Reporting
n Floating LED Driver Allows Single Power Solution
to Drive Multicolor LEDs or Single LED with Three
Different Regulated Currents
n Thermally Enhanced 5mm × 6mm QFN 36-Lead
Package
Applications
n LED Driver for DLP Projectors
n Heads-Up Displays
n High Power LED
LT3744
High Current Synchronous
Step-Down LED Driver
Description
The LT®3744 is a fixed frequency synchronous step-down
DC/DC controller designed to drive a LED load at up to 20A
continuous or 40A pulsed. The peak current mode controller
will maintain ±3% LED current regulation over a wide output
voltage range, from VEE to VIN. By allowing VEE to float
to negative voltages, several LEDs in series can be driven
from a single Li-Ion battery with a simple, single step-down
output stage. PWM dimming is achieved with the PWM pins.
The regulated LED current is set with analog voltages at the
CTRL pins. Regulated voltage and overvoltage protection
are set with a voltage divider from the output to the FB pin.
The switching frequency is programmable from 100kHz to
1MHz through an external resistor on the RT pin.
Additional features include an accurate external reference
voltage, a control input for thermally derating regulation
current, an accurate EN/UVLO pin, an open-drain output
fault flag, OVLO, frequency synchronization, and thermal
shutdown.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 7199560, 7321203, 8120335 and 8901904.
Typical Application
LED Driver for DLP Projectors
EN/UVLO
2V
2.2µF 100k
45.3k
680k
1nF
82.5k
4.7nF 51k
4.7nF
51k
4.7nF 51k
EN/UVLO
PWM1
VIN
PWM2
PWM3
CTRL1
TG
CTRL2
CTRL3
BOOST
SW
LT3744
VREF
INTVCC
FAULT
CTRLT
SGND
BG
VEE
ISP
ISN
SYNC
SS
RT
VEE
PWM_OUT1
PWM_OUT2
VFNEG
PWM_OUT3
VC1 LED_ISP
LED_ISN
VC2 FB
VC3
20µF
VEE
220nF
VIN
220µF 3.3V TO 12V
22µF
0.47µH 1mΩ
330µF
330µF
330µF
VEE
20A MAXIMUM
51k
GREEN
10µF
3mΩ
10k
3744 TA01a
For more information www.linear.com/LT3744
LED Current Waveforms
(2000:1) 0A to 6.7A to 13.3A to 20A
PWM1
5V/DIV
PWM2
5V/DIV
PWM3
5V/DIV
ILED
6.7A/DIV
25µsec/DIV
3744 TA01b
3744fa
1
1 page  
LT3744
E lectrical Characteristics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, VEN/UVLO = 2V, SGND = VEE = 0V unless otherwise noted.
PARAMETER
CONDITIONS
MIN TYP MAX
UNITS
Voltage Regulation Amplifier
FB Pin Current
gm
Feedback Regulation Voltage
VFB = 1.2V
l 1.169
1.2
600
1.205
1.241
µA
μA/V
V
LED Current Control Loop gm Amplifier
Input Bias Current (LED_ISP and LED_ISN)
CTRL1 = 1.5V, PWM1 = 2V, PWM2, PWM3, LED_ISP
and LED_ISN = 0V
65
μA
Output Impedance
25 MΩ
gm
Differential Gain
200 μA/V
5 kV/V
C/10 Comparator
Falling Threshold
LED_ISN = 0V, Threshold = LED_ISP-LED_ISN,
CTRL1 = CTRL2 = CTRL3 = 2V
4.0 6 8.0
mV
Rising Hysteresis
LED_ISN = 0V, Threshold = LED_ISP-LED_ISN,
CTRL1 = CTRL2 = CTRL3 = 2V
3.0 mV
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for an extended periods may affect device
reliability and lifetime.
Note 2: The LT3744E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3744I is guaranteed to meet performance specifications over the –40°C
to 125°C operating junction temperature range.
Note 3: The minimum on and off times are guaranteed by design and are
not tested.
Note 4: Do not apply a positive or negative voltage to INTVCC, RT, VREF,
SS, TG, BG, PWM_OUT1, PWM_OUT2, or PWM_OUT3 pins, otherwise
permanent damage may occur.
For more information www.linear.com/LT3744
3744fa
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5 Page 
LT3744
Pin Functions
EN/UVLO (Pin 1): The EN/UVLO pin acts as a precision
enable and turns on the internal current bias core and
subregulators with a rising threshold of 1.30V and a fall-
ing threshold of 1.235V. The pin has a 4.8μA pull-down
current when below 1.235V. For normal operation, this
pin requires a voltage bias. Full shutdown occurs at ap-
proximately 0.5V and low IQ operations is guaranteed
below 0.3V. This pin is referenced to SGND.
CTRL1, CTRL2, CTRL3 (Pin 2, 4, 5): The voltage at the
CTRL pins set the regulated LED current. When PWM1
is high and PWM2 and PWM3 are low, CTRL1 is used.
When PWM2 is high and PWM3 is low, CTRL2 is used.
Whenever PWM3 is high, CTRL3 is used. The maximum
analog control is 1.5V providing 60mV regulated voltage
across the LED_ISP and LED_ISN sense resistor. The
analog dimming range using the CTRL pins is 20:1. This
means the lowest CTRL input for guaranteed operation is
75mV. At this VCTRL, the voltage between the LED_ISP and
LED_ISN pins will be regulated at 3mV ±500µV (±17%).
All CTRL pins are referenced to SGND.
VREF (Pin 3): VREF is a buffered 2.0V reference capable of
0.5mA drive. This pin is referenced to SGND. A minimum
capacitance of 2.2µF to SGND is required on this pin.
CTRLT (Pin 6): The voltage at the CTRLT pin limits the
regulated LED current whenever CTRLT is lower than
CTRL1, CTRL2 or CTRL3. This pin may be used for ther-
mally limiting the LED current using an NTC resistor. The
CTRLT pin is referenced to SGND.
PWM1, PWM2, PWM3 (Pins 7, 8, 9): Pins PWM1, PWM2
and PWM3 are digital input pins that determine which of
the CTRL voltages are used to regulate the LED current
and which LEDs and/or capacitors are connected to the
output. All PWM input pins are referenced to SGND.
SYNC (Pin 10): Frequency Synchronization Pin. This pin
allows the switching frequency to be synchronized to an
external clock. The RT resistor should be chosen to oper-
ate the internal clock at 10% slower than the SYNC pulse
frequency. This pin should be grounded when not in use.
The SYNC pin is referenced to SGND.
FAULT (Pin 11): The FAULT pin indicates either an
overvoltage or shorted output. At FB voltages less than
250mV and greater than 1.1V (with VLED_ISP - VLED_ISN
less than 6mV), the FAULT pin is pulled low to SGND. The
pull-down impedance is 50Ω. The FAULT pin is referenced
to SGND.
SGND (Pin 12): System/Board Ground. All input pins are
referenced to SGND. VSGND-VEE may have a potential
difference of up to 20V. The voltage at the VEE pin should
never be higher than the voltage at the SGND pin. For
proper operation when configured as an inverting buck-
boost regulator, use a low VF Schottky diode between
VEE and SGND.
RT (Pin 13): A resistor to ground sets the switching fre-
quency between 100kHz and 1.0MHz. This pin is current
limited to 66μA. Connect this pin through a resistor to
VEE only. Do not connect to SGND and do not leave this
pin open.
SS (Pin 14): Soft-Start Pin. Place a capacitor from this pin
to VEE to limit the start-up voltage ramp. The SS pin has
a 5μA charging current and is referenced to VEE.
LED_ISN (Pin 15): LED_ISN is the noninverting input
of the LED current sensing error amplifier. Connect this
pin to the lower terminal of an external current sense
resistor in series with the LED cathode or the source of
the LED disconnect FET (LED_ISN must be connected to
VEE). The voltage drop between LED_ISP and LED_ISN
is regulated to the current determined by the voltage of
the CTRL1, CTRL2 and CTRL3 pins. The LED_ISN pin is
referenced to VEE.
LED_ISP (Pin 16): LED_ISP is the inverting input of the
LED current sensing error amplifier. Connect this pin to the
upper terminal of the sense resistor in series with the LED
cathode. The voltage drop between LED_ISP and LED_ISN
is regulated to the current determined by the voltage at
the CTRL pins. The LED_ISP pin is referenced to VEE.
For more information www.linear.com/LT3744
3744fa
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LT3744.PDF ] | |
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