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PDF NB3V60113GV3 Data sheet ( Hoja de datos )

Número de pieza NB3V60113GV3
Descripción 1.8 V 12.288 MHz OmniClock Generator
Fabricantes ON Semiconductor 
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NB3V60113GV3
1.8 V 12.288 MHz OmniClock
Generator with Single Ended
(LVCMOS) Output
The NB3V60113GV3, which is a member of the OmniClock family,
is a low power PLL−based clock generator. The device accepts a
6.144 MHz single ended (LVCMOS) reference clock as input. It
generates one single ended (LVCMOS) output of 12.288 MHz. The
device can be powered down using the Power Down pin (PD#).
Features
Member of the OmniClock Family of Programmable Clock
Generators
Operating Power Supply: 1.8 V ± 0.1 V
I/O Standards
Input: 6.144 MHz Reference Clock (LVCMOS)
Output: 12.288 MHz (LVCMOS)
Output Drive Current for Single Ended Output: 8 mA
Power Saving Mode through Power Down Pin
Temperature Range −40°C to 85°C
Packaged in 8−Pin WDFN
These are Pb−Free Devices
Typical Application
Audio Systems (Lightning Audio Module)
www.onsemi.com
WDFN8
CASE 511AT
MARKING DIAGRAM
1
V3MG
G
V3 = Specific Device Code
M = Date Code
G = Pb−Free Device
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
© Semiconductor Components Industries, LLC, 2016
October, 2016 − Rev. 0
1
Publication Order Number:
NB3V60113GV3/D

1 page




NB3V60113GV3 pdf
NB3V60113GV3
PARAMETER MEASUREMENT TEST CIRCUIT
LVCMOS Clock
Hi−Z Probe
CL
Measurement
Equipment
Figure 3. LVCMOS Clock Parameter Measurement
TIMING MEASUREMENT DEFINITIONS
LVCMOS
Clock Output
t2
t1
tDC = 100 * t1 / t2
80% of VDD
50% of VDD
20% of VDD
GND
tr tf
Figure 4. LVCMOS Measurement for AC Parameters
tperiod−jitter
Clock
Output
Clock
Output
tNcycle
50% of CLK Swing
t(N+1)cycle
50% of CLK Swing
tCTC−jitter = t(N+1)cycle − tNcycle (over 1000 cycles)
Figure 5. Period and Cycle−Cycle Jitter Measurement
www.onsemi.com
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