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PDF BU2365FV Data sheet ( Hoja de datos )
| Número de pieza | BU2365FV | |
| Descripción | Clock Generator | |
| Fabricantes | ROHM Semiconductor | |
| Logotipo |  |
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TECHNICAL NOTE
High-performance Clock Generator Series
Clock Generator
with Built-in VCXO
for Audio/Video Equipments
BU2365FV
●Description
The ROHM Clock Generator is an IC allowing for the generation of multiple clocks by a single chip through the connection of
a single crystal oscillator. The BU2365FV incorporates the ROHM’s unique PLL technology to provide the generation of
multiple high C/N clocks necessary for the DVD recorder system. This Clock Generator has the built-in high-precision
VCXO function and allows for high-precision synchronization with DVD Video clocks. It also has a built-in buffer having high
driving force and allows the supply of multiple 27MHz Video clocks for the system, thus providing the reduced number of the
system components.
●Features
1) The ROHM’s unique PLL technology allows for the generation of high C/N clocks.
2) Built-in high precision VCXO, which is essential for the DVD recorder system
3) Built-in buffer having high driving force (Load capacity/output CL=50pF, 27MHz drive, 1×input / 2×outputs)
4) Built-in half pulse clock protection [HPC]
5) Built-in power down function, Icc=0 uA(typ.)
6) SSOP-B24 package
7) Single power supply of 3.3 V
●Application
DVD recorder
●Absolute Maximum Ratings（Ta=25℃）
Parameter
Symbol
Limit
Unit
Supply voltage
VDD
－0.3～7.0
Ｖ
Input voltage
VIN －0.3～VDD+0.3
Ｖ
Storage temperature range
Tstg
－30～125
℃
Power dissipation
PD
820
mW
*1 Operation is not guaranteed.
*2 In the case of exceeding Ta = 25℃, 8.2mW should be reduced per 1℃.
*3 The radiation-resistance design is not carried out.
*4 Power dissipation is measured when the IC is mounted to the printed circuit board.
Sep. 2008
1 page  
●Reference data (Basic data)
RBW=1KHz
VBW=100Hz
5.0nsec／div
Fig.15 54MHz output
waveform
VDD=3.3V,CL=15pF
500psec／div
Fig.16 54MHz Period-Jitter
VDD=3.3V,CL=15pF
10KHz／div
Fig.17 54MHz spectrum
VDD=3.3V,CL=15pF
RBW=1KHz
VBW=100Hz
5.0nsec／div
Fig.18 BUF_OUT(27MHz) output
waveform
VDD=3.3V,CL=50pF
500psec／div
Fig.19 BUF_OUT(27MHz) Period-Jitter
VDD=3.3V,CL=50pF
10KHz／div
Fig.20 BUF_OUT(27MHz) spectrum
VDD=3.3V,CL=50pF
RBW=1KHz
VBW=100Hz
5.0nsec／div
Fig.21 VCXO_OUT(27MHz) output
waveform
VDD=3.3V,CL=4pF
500psec／div
Fig.22 VCXO_OUT(27MHz) Period-Jitter
VDD=3.3V,CL=4pF
10KHz／div
Fig.23 VCXO_OUT(27MHz) spectrum
VDD=3.3V,CL=4pF
5.0nsec／div
Fig.24 Buffer skew output
waveform
VDD=3.3V,CL=50pF
5.0nsec／div
Fig.25 Buffer delay(IN→OUT1)
VDD=3.3V,CL=50pF
5.0nsec／div
Fig.26 Buffer delay(IN→OUT2)
VDD=3.3V,CL=50pF
5/16
5 Page 
●Block diagram, Pin assignment
3Pin：FSEL
PLL1
7Pin：XTAL_IN
27.0000MHz
Crystal
8Pin：XTAL_OUT
10Pin：VCTRL
VCXO
H:PLL ON
L:PLL OFF
PLL0
PLL2
23Pin：OE
1/4
1/4
1/4
1/8
1/6
H:output enable
L:L out
16Pin：BUF_IN
(27MHz)
Fig.77 Block diagram
22Pin：CLK768FS output
(FSEL=L：33.8688MHz)
(FSEL=OPEN：36.864MHz)
24Pin：CLK54M output
(54.0000MHz)
19Pin：CLK384FS output
(18.432MHz)
18Pin：CLK512FS output
(24.576MHz)
12Pin：VCXO_OUT output
(27.0000MHz)
14Pin：BUF_OUT1 output
(CL=50pF、27MHz)
13Pin：BUF_OUT2 output
(CL=50pF、27MHz)
1: VDD54M
2: VSS54M
3: FSEL
4: TEST
5: AVDD
6: AVSS
7: XTAL_IN
8: XTAL_OUT
9: VDD_V
10: VCTRL
11: VSS_V
12: VCXO_OUT
24: CLK54M
23: OE
22: CLK768FS
21: VDD
20: VSS
19: CLK384FS
18: CLK512FS
17: VDD_B
16: BUF_IN
15: VSS_B
14: BUF_OUT1
13: BUF_OUT2
Fig.78 Pin assignment
●Pin function
Pin No. Pin Name
1 VDD54M
2 VSS54M
3 FSEL
4 TEST
5 AVDD
6 AVSS
7 XTAL_IN
8 XTAL_OUT
9 VDD_V
10 VCTRL
11 VSS_V
12 VCXO_OUT
13 BUF_OUT2
14 BUF_OUT1
15 VSS_B
16 BUF_IN
17 VDD_B
18 CLK512FS
19 CLK384FS
20 VSS
21 VDD
22 CLK768FS
23 OE
24 CLK54M
Function
Power supply for CLK54M output
GND for CLK54M output
FS select (CLK768FS selection)
(FSEL=L: 44.1 kHz, FSEL=OPEN: 48 kHz, equipped with pull-up resistor)
TEST pin, normally “OPEN”, equipped with pull-down resistor)
Power supply for PLL Analog
GND for PLL Analog
Crystal oscillator input pin
Crystal oscillator output pin
Power supply for VCXO
VCXO control input pin
GND for VCXO
Monitor pin for VCXO output
BUFFER output pin
BUFFER output pin
GND for BUFFER
BUFFER input pin
Power supply for BUFFER
24.576 MHz output
18.432MHz output
GND for PLL Logic
Power supply for PLL Logic
FSEL=L: 33.8688 MHz output, FSEL=OPEN: 36.864 MHz output
Output enable pin
L: POWER DOWN, OPEN: NORMAL, equipped with pull-up resistor
54MHz output
11/16
11 Page | ||
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