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PDF CD22101 Data sheet ( Hoja de datos )
| Número de pieza | CD22101 | |
| Descripción | CMOS 4 x 4 x 2 Crosspoint Switch with Control Memory | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Semiconductor
CD22101, CD22102
[ /Title
(CD22
101,
CD221
02)
/Sub-
ject
(CMO
S4x4
x2
Cross-
point
Switch
with
Con-
trol
Mem-
ory)
/
Author
()
/Key-
words
(Har-
ris
Semi-
con-
ductor,
Tele-
com,
SLICs,
SLACs
, Tele-
phone,
Tele-
phony,
WLL,
Wire-
less
February 1999
Features
CNalOl CoRerEneCtOmrOaBalMSiAlMO:pLEcpENeliTncDEtaEatpDiPopRnR@OsEDh1PaU-L8rCAr0iTC0s-.Ec4Mo42mE-N77T47
CMOS 4
Description
x
4
x 2 Crosspoint Switch
with Control Memory
• Low ON Resistance . . . . . . . . . . . . 75Ω (Typ) at VDD = 12V
• “Built - In” Latched Inputs
• Large Analog Signal Capability . . . . . . . . . . . . . . . ±VDD/2
• Switch Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . 10MHz
• Matched Switch Characteristics
∆RON = 8Ω (Typ) at VDD = 12V
• High Linearity - 0.25% Distortion (Typ) at f = 1kHz,
VIN = 5VP-P, VDD - VSS = 10V, and RL = 1kΩ
• Standard CMOS Noise Immunity
Applications
• Telephone Systems
• PBX
• Studio Audio Switching
• Multisystem Bus Interconnect
Ordering Information
PART
NUMBER
CD22101E
TEMP.
RANGE (oC)
PACKAGE
-40 to 85 24 Ld PDIP
PKG. NO.
E24.6
CD22101 and CD22102 crosspoint switches consist of
4 x 4 x 2 arrays of crosspoints (transmission gates) with a
4-line to 16-line decoder and 16 latch circuits. Any one of
the sixteen crosspoint pairs can be selected by applying
the appropriate four-line address, corresponding
crosspoints in each array are turned on and off
simultaneously. Any number of crosspoints can be turned
on simultaneously.
In the CD22101, the selected crosspoint pair can be
turned on or off by applying a logic ONE or ZERO,
respectively, to the data input, and applying a ONE to the
strobe input. When the device is “powered up”, the states
of the 16 switches are indeterminate. Therefore, all
switches must be turned off by putting the strobe high,
data-in low, and then addressing all switches in
succession.
The selected pair of crosspoints in the CD22102 is turned
on by applying a logic ONE to the KA (set) input while a
logic ZERO is on the KB input, and turned off by applying
a logic ONE to the KB (reset) input while a logic ZERO is
on the KA input. In this respect, the control latches of the
CD22102 are similar to SET/RESET flip-flops. They differ,
however, in that the simultaneous application of ONEs to
the KA and KB inputs turns off (resets) all crosspoints. All
crosspoints in both devices must be turned off as VDD is
applied.
CD22101F
-55 to 125 24 Ld CERDIP F24.6
CD22102E
-40 to 85 24 Ld PDIP
E24.6
Pinouts
CD22101
(PDIP, SBDIP)
TOP VIEW
B1
C2
X2' 3
Y1' 4
Y2' 5
X4' 6
X3' 7
Y4' 8
Y3' 9
X1' 10
D 11
VSS 12
24 VDD
23 A
22 X2
21 Y1
20 Y2
19 X4
18 X3
17 Y4
16 Y3
15 X1
14 DATA
13 STROBE
CD22102
(PDIP)
TOP VIEW
B1
C2
X2' 3
Y1' 4
Y2' 5
X4' 6
X3' 7
Y4' 8
Y3' 9
X1' 10
D 11
VSS 12
24 VDD
23 A
22 X2
21 Y1
20 Y2
19 X4
18 X3
17 Y4
16 Y3
15 X1
14 KA
13 KB
Functional Diagram
CONTROL
DECODER
LATCH
16
16
16
IN (OUT)
4X4
SWITCH
OUT (IN)
4X4
SWITCH
OUT (IN)
IN (OUT)
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1999
4-193
File Number 2871.3
1 page  
CD22101, CD22102
Electrical Specifications TA = 25oC (Continued)
TEST CONDITIONS
PARAMETER
fIS
SYMBOL FIGURE (kHz)
RL
(kΩ)
VIS (V)
(Note 3)
Minimum KB Pulse Width, CD22102
tW
- RL = 1kΩ, CL = 50pF,
tR, tF = 20ns
Control Crosstalk, Data-In, Address
or Strobe to Output
11 100 10
Square Wave Input = 5V,
tR, tF = 20ns, RS = 1kΩ
Input Capacitance
CIN Any Control Input
NOTES:
3. Peak-to-peak voltage symmetrical about
V----D-2---D---, unless otherwise specified.
4. RMS.
VDD
(V)
5
10
15
5
-
MIN TYP MAX UNITS
- 200 400 ns
- 90 180 ns
- 70 140 ns
- 75 - mVPEAK
- 5 7.5 pF
Functional Block Diagram
CD22102
ONLY
KB KA
CD22101
ONLY
STROBE
DATA
(NOTE) 13
(NOTE) 14
ADDRESS
23
A
(NOTE)
1
B
(NOTE)
2
C
(NOTE)
DECODER
16
11
D
(NOTE)
LATCHES
16
16
16
NOTE: INPUTS PROTECTED
BY COS/MOS
PROTECTION
NETWORK
VDD
VSS
0 1 23
4 5 67
8 9 10 11
12 13 14 15
Y1
21
Y2
20
Y3
16
SIGNALS
OUT (IN)
Y4
17
15 22
18 19
X1 X2 X3 X4
SIGNALS IN (OUT)
0’ 1’ 2’ 3’
4’ 5’ 6’ 7’
8’ 9’ 10’ 11’
12’ 13’ 14’ 15’
Y1’
4
Y2’
5
Y3’
9
SIGNALS
OUT (IN)
Y4’
8
10 3
76
X1’ X2’ X3’ X4’
SIGNALS IN (OUT)
4-197
5 Page 
CD22101, CD22102
Test Circuits and Waveforms (Continued)
STROBE
50%
DATA
tSU
50%
ADDRESS
tH
OUTPUT OF SWITCH
ADDRESSED
IF SETUP AND HOLD TIMES PROVIDED ARE TOO SHORT,
AN UNADDRESSED SWITCH MAY BE TURNED ON OR OFF
SIMULTANEOUSLY WITH THE ADDRESSED SWITCH
DATA-IN
STROBE
Y2
tHLH
1µs
50%
tHHL
1µs
tHLH
50%
1µs
SET ALL SWITCHES TO OFF INITIALLY APPLY VDD
TO ALL X INPUTS AND RETURN ALL Y OUTPUTS TO
VSS THROUGH 1kΩ. ADDRESS X1Y2 (ABCD) WITH fIN = 10kHz
FIGURE 9. ADDRESS TO STROBE SETUP AND HOLD TIMES FIGURE 10. STROBE TO DATA-IN HOLD TIME tH, FOR CD22101
CONTROLS
X (N)
1kΩ
SW Y (N)
10kΩ
SW = ANY CROSSPOINT
VDD
CONTROL
0
75mV
VOS
0
5µs
FIGURE 11. TEST CIRCUIT AND WAVEFORMS FOR CROSSTALK (CONTROL INPUT TO SIGNAL OUTPUT)
VIS
600Ω
ON
SW
600Ω
SW = ANY CROSSPOINT
600Ω
OFF
SW
VOS
600Ω
-140
-120
-100
-80
-60
-40
-20
0
102
VDD = 5V
10V
15V
TA = 25oC
RS = 600Ω
RL = 600Ω
VIS = 1VRMS
103 104 105 106
INPUT SIGNAL FREQUENCY (Hz)
107
FIGURE 12. TEST CIRCUIT AND TYPICAL CROSSTALK AS A FUNCTION OF FREQUENCY BETWEEN SWITCH CIRCUITS IN THE
SAME PACKAGE
4-203
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet CD22101.PDF ] | |
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