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Número de pieza | CD4010C | |
Descripción | Hex Buffers (Non-Inverting) | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de CD4010C (archivo pdf) en la parte inferior de esta página. Total 5 Páginas | ||
No Preview Available ! October 1987
Revised June 2000
CD4010C
Hex Buffers (Non-Inverting)
General Description
The CD4010C hex buffers are monolithic complementary
MOS (CMOS) integrated circuits. The N- and P-channel
enhancement mode transistors provide a symmetrical cir-
cuit with output swings essentially equal to the supply volt-
age. This results in high noise immunity over a wide supply
voltage range. No DC power other than that caused by
leakage current is consumed during static conditions. All
inputs are protected against static discharge. These gates
may be used as hex buffers, CMOS to DTL or TTL inter-
face or as CMOS current drivers. Conversion ranges are
from 3V to 15V providing VCC ≤ VDD. The devices also
have buffered outputs which improve transfer characteris-
tics by providing very high gain.
Features
s Wide supply voltage range: 3.0V to 15V
s Low power: 100 nW (typ.)
s High noise immunity: 0.45 VDD (typ.)
s High current sinking: 8 mA (min.) at VO = 0.5V
capability: and VDD = 10V
Applications
• Automotive
• Data terminals
• Instrumentation
• Medical electronics
• Alarm system
• Industrial controls
• Remote metering
• Computers
Ordering Code:
Order Number Package Number
Package Description
CD4010CM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
CD4010CN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Schematic Diagram
Pin Assignments for DIP and SOIC
Top View
Hex COS/MOS to DTL or TTL
converter (inverting).
Connect VCC to DTL or TTL supply.
Connect VDD to COS/MOS supply.
© 2000 Fairchild Semiconductor Corporation DS005945
www.fairchildsemi.com
1 page Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
5 www.fairchildsemi.com
5 Page |
Páginas | Total 5 Páginas | |
PDF Descargar | [ Datasheet CD4010C.PDF ] |
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