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What is 874S02I?

This electronic component, produced by the manufacturer "IDT", performs the same function as "1:1 Differential-to-LVDS Zero Delay Clock Generator".


874S02I Datasheet PDF - IDT

Part Number 874S02I
Description 1:1 Differential-to-LVDS Zero Delay Clock Generator
Manufacturers IDT 
Logo IDT Logo 


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1:1 Differential-to-LVDS Zero Delay
Clock Generator
874S02I
Data Sheet
General Description
The 874S02I is a highly versatile 1:1 Differential- to-LVDS Clock
Generator and a member of the family of High Performance Clock
Solutions from IDT. The 874S02I has a fully integrated PLL and
can be configured as a zero delay buffer, multiplier or divider, and
has an output frequency range of 62.5MHz to 1GHz. The
reference divider, feedback divider and output divider are each
programmable, thereby allowing for the following output-to-input
frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8. The external
feedback allows the device to achieve “zero delay” between the
input clock and the output clocks. The PLL_SEL pin can be used
to bypass the PLL for system test and debug purposes. In bypass
mode, the reference clock is routed around the PLL and into the
internal output dividers.
Features
One differential LVDS output pair and
one differential feedback output pair
One differential clock input pair
CLK/nCLK can accept the following differential input levels:
LVPECL, LVDS, LVHSTL, SSTL
Input frequency range: 62.5MHz to 1GHz
Output frequency range: 62.5MHz to 1GHz
VCO range: 500MHz - 1GHz
External feedback for "zero delay" clock regeneration with
configurable frequencies
Programmable dividers allow for the following output-to-input
frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8
Cycle-to-cycle jitter: 35ps (maximum)
Static phase offset: ±100ps
Full 3.3V supply mode
-40°C to 85°C ambient operating temperature
Available in lead-free packages
Block Diagram
PLL_SEL Pullup
CLK Pulldown
nCLK Pullup
÷1, ÷2, ÷4, ÷8,
÷16, ÷32, ÷64
PLL
FB_IN Pulldown
nFB_IN Pullup
8:1, 4:1, 2:1, 1:1,
1:2, 1:4, 1:8
0
1
SEL0 Pulldown
SEL1 Pulldown
SEL2 Pulldown
SEL3 Pulldown
MR Pulldown
Q
nQ
QFB
nQFB
Pin Assignment
CLK
nCLK
MR
nFB_IN
FB_IN
SEL2
VDDO
nQFB
QFB
GND
1
2
3
4
5
6
7
8
9
10
20 SEL1
19 SEL0
18 VDD
17 PLL_SEL
16 VDDA
15 SEL3
14 GND
13 Q
12 nQ
11 VDDO
874S02I
20-Lead SOIC
7.5mm x 12.8mm x 2.3mm package body
M Package
Top View
©2016 Integrated Device Technology, Inc
1
January 26, 2016

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874S02I equivalent
874S02I Data Sheet
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, VDD
Inputs, VI
Outputs, IO (LVDS)
Continuous Current
Surge Current
Package Thermal Impedance, JA
Storage Temperature, TSTG
Rating
4.6V
-0.5V to VDD + 0.5V
10mA
15mA
64.7°C/W (0 lfpm)
-65C to 150C
DC Electrical Characteristics
Table 4A. LVDS Power Supply DC Characteristics, VDD = VDDO = 3.3V ± 5%, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum
Typical Maximum
VDD
VDDA
VDDO
IDD
IDDA
IDDO
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Output Supply Current
3.135
VDD – 0.20
3.135
3.3
3.3
3.3
3.465
VDD
3.465
97
20
40
Units
V
V
V
mA
mA
mA
Table 4B. LVCMOS/LVTTL DC Characteristics, VDD = VDDO = 3.3V ± 5%, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum Typical
VIH Input High Voltage
VIL Input Low Voltage
MR, SEL[0:3]
IIH
Input High Current
PLL_SEL
MR, SEL[0:3]
IIL Input Low Current
PLL_SEL
VDD = VIN = 3.465V
VDD = VIN = 3.465V
VDD = 3.465V, VIN = 0V
VDD = 3.465V, VIN = 0V
2.2
-0.3
-10
-150
Maximum
VDD + 0.3
0.8
150
10
Units
V
V
µA
µA
µA
µA
©2016 Integrated Device Technology, Inc
5
January 26, 2016


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Part Details

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Featured Datasheets

Part NumberDescriptionMFRS
874S02IThe function is 1:1 Differential-to-LVDS Zero Delay Clock Generator. IDTIDT

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