(PDF) CD4019BM Datasheet - Quad AND-OR Select Gate

Número de pieza	CD4019BM
Descripción	Quad AND-OR Select Gate
Fabricantes	National Semiconductor
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No Preview Available ! February 1988 CD4019BM CD4019BC Quad AND-OR Select Gate General Description The CD4019BM CD4019BC is a complementary MOS quad AND-OR select gate Low power and high noise margin over a wide voltage range is possible through implementa- tion of N- and P-channel enhancement mode transistors These complementary MOS (CMOS) transistors provide the building blocks for the 4 ‘‘AND-OR select’’ gate configura- tions each consisting of two 2-input AND gates driving a single 2-input OR gate Selection is accomplished by control bits KA and KB All inputs are protected against static dis- charge damage Features Y Wide supply voltage range Y High noise immunity Y Low power TTL compatibility 3 0V to 15V 0 45 VDD (typ ) Fan out of 2 driving 74L or 1 driving 74LS Applications Y AND-OR select gating Y Shift-right shift-left registers Y True complement selection Y AND OR EXCLUSIVE-OR selection Connection and Schematic Diagrams Dual-In-Line Package Order Number CD4019B Top View TL F 5952 – 1 Schematic diagram for 1 of 4 identical stages C1995 National Semiconductor Corporation TL F 5952 TL F 5952 – 2 RRD-B30M105 Printed in U S A 1 page

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PDF CD4019BM Data sheet ( Hoja de datos )