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PDF AD9214 Data sheet ( Hoja de datos )

Número de pieza AD9214
Descripción 3V A/D Converter
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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a
FEATURES
SNR = 57 dB @ 39 MHz Analog Input (–0.5 dBFS)
Low Power
190 mW at 65 MSPS
285 mW at 105 MSPS
30 mW Power-Down Mode
300 MHz Analog Bandwidth
On-Chip Reference and Track/Hold
1 V p-p or 2 V p-p Analog Input Range Option
Single 3.3 V Supply Operation (2.7 V–3.6 V)
Two’s Complement or Offset Binary Data Format Option
APPLICATIONS
Battery-Powered Instruments
Hand-Held Scopemeters
Low-Cost Digital Oscilloscopes
Ultrasound Equipment
Cable Reverse Path
Broadband Wireless
Residential Power Line Networks
10-Bit, 65/80/105 MSPS
3 V A/D Converter
AD9214
FUNCTIONAL BLOCK DIAGRAM
AD9214
AIN
BUFFER
AIN
ENCODE
AVDD PWRDWN
DrVDD
PIPELINE 10
T/H ADC
CORE
TIMING
REF
DFS/GAIN
OR
10
D9–D0
AGND REF REFSENSE
DGND
PRODUCT DESCRIPTION
The AD9214 is a 10-bit monolithic sampling analog-to-digital
converter (ADC) with an on-chip track-and-hold circuit, and
is optimized for low cost, low power, small size, and ease of use.
The product operates up to 105 MSPS conversion rate with
outstanding dynamic performance over its full operating range.
The ADC requires only a single 3.3 V (2.7 V to 3.6 V) power
supply and an encode clock for full performance operation. No
external reference or driver components are required for many
applications. The digital outputs are TTL/CMOS compatible
and a separate output power supply pin supports interfacing
with 3.3 V or 2.5 V logic.
The clock input is TTL/CMOS compatible. In the power-down
state, the power is reduced to 30 mW. A gain option allows
support for either 1 V p-p or 2 V p-p analog signal input swing.
Fabricated on an advanced CMOS process, the AD9214 is
available in a 28-lead surface-mount plastic package (28-SSOP)
specified over the industrial temperature range (–40°C to +85°C).
PRODUCT HIGHLIGHTS
High Performance—Outstanding ac performance from 65 MSPS
to 105 MSPS. SNR greater than 55 dB typical and as high
as 58 dB.
Low Power—The AD9214 at 285 mW consumes a fraction of
the power available in existing high-speed monolithic solutions.
In sleep mode, power is reduced to 30 mW.
Single Supply—The AD9214 uses a single 3 V supply, simplify-
ing system power supply design. It also features a separate digital
output driver supply line to accommodate 2.5 V logic families.
Small Package—The AD9214 is packaged in a small 28-lead
surface-mount plastic package (28-SSOP).
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002

1 page




AD9214 pdf
AD9214–SPECIFICATIONS
SWITCHING SPECIFICATIONS (AVDD = 3 V, DrVDD = 3 V; ENCODE = Maximum Conversion Rate; TMIN = –40؇C, TMAX = +85؇C;
external 1.25 V voltage reference used, unless otherwise noted.)
Parameter
Temp
Test AD9214-65
AD9214-80
AD9214-105
Level Min Typ Max Min Typ Max Min Typ Max Unit
ENCODE INPUT PARAMETERS*
Maximum Conversion Rate
Minimum Conversion Rate
Encode Pulsewidth High (tEH)
Encode Pulsewidth Low (tEL)
Aperture Delay (tA)
Aperture Uncertainty (Jitter)
Full
Full
Full
Full
25°C
25°C
VI
IV
IV
IV
V
V
65
20
6.0
6.0
2.0
3
80
20
5.0
5.0
2.0
3
105
3.8
3.8
2.0
3
MSPS
20 MSPS
ns
ns
ns
ps rms
DATA OUTPUT PARAMETERS
Pipeline Delays
Output Valid Time (tV)*
Output Propagation Delay* (tPD)
TRANSIENT RESPONSE TIME
Full
Full
Full
25°C
IV
V
V
V
5 5 5 Clock Cycle
3.0 4.5
3.0 4.5
3.0 4.5
ns
4.5 6.0
4.5 6.0
4.5 6.0 ns
5 5 5 ns
OUT-OF-RANGE RECOVERY TIME 25°C V
5
5
5 ns
*tV and tPD are measured from the 1.5 V level of the ENCODE input to the 50% levels of the digital output swing. The digital output load during test is not to exceed
an ac load of 5 pF or a dc current of ± 40 µA.
Specifications subject to change without notice.
AIN
ENCODE
SAMPLE N
tA
tEH
tEL
SAMPLE N+1
SAMPLE N+5
1/FS
SAMPLE N+2
SAMPLE N+3
SAMPLE N+4
D9 D0
DATA N5
DATA N4
DATA N3
tPD
DATA N2
DATA N1
Figure 1. Timing Diagram
tV
DATA N
–4– REV. D

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AD9214 arduino
AD9214
100
90
80
70
SFDR
60
2ND
3RD
50
40
0
20 40 60
FREQUENCY MHz
80
TPC 7. Harmonic Distortion (Second and Third) and SFDR
vs. AIN Frequency (1 V p-p and 2 V p-p, fS = 65 MSPS)
75
SFDR 1V pp
70
65
SFDR 2V pp
60
SINAD 1V pp
55
SINAD 2V pp
50
45
40
20
40 60 80 100
ENCODE RATE MSPS
120
TPC 10. SINAD and SFDR vs. Encode Rate (fIN = 10.3 MHz;
1 V p-p and 2 V p-p)
0
ENCODE: 80MSPS
10 AIN: 29.3MHz @ 6dBFS
30.3MHz @ 6dBFS
20 SFDR: 74dBFS
30
40
50
60
70
80
90
100
0
FREQUENCY MHz
40
TPC 8. Two-Tone Intermodulation Distortion (29.3 MHz,
30.3 MHz; 1 V p-p, fS = 80 MSPS)
75
SFDR 80MSPS
70
65
SFDR 105MSPS
60
55
50
SINAD 80MSPS
45
SINAD 105MSPS
40
35
30
2 4 6 8 10
PULSEWIDTH HIGH ns
TPC 11. SINAD and SFDR vs. Encode Pulsewidth High
(1 V p-p)
0
ENCODE: 105MSPS
10 AIN: 30MHz @ 6dBFS
31MHz @ 6dBFS
20 SFDR: 73dBFS
30
40
50
60
70
80
90
100
0
FREQUENCY MHz
52.5
TPC 9. Two-Tone Intermodulation Distortion (30 MHz and
31 MHz; 1 V p-p, fS = 105 MSPS)
120 12
100
IAVDD
80
10
8
60 6
IDrVDD
40 4
20 2
00
0 20 40 60 80 100 120
ENCODE RATE MSPS
TPC 12. IAVDD and IDrVDD vs. Encode Rate (fAIN = 10.3 MHz,
–0.5 dBFS, and –3 dBFS) CLOAD on Digital Outputs ~7 pF
–10–
REV. D

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