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PDF CD4027BMS Data sheet ( Hoja de datos )
| Número de pieza | CD4027BMS | |
| Descripción | CMOS Dual J-K Master-Slave Flip-Flop | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CD4027BMS (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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CD4027BMS
December 1992
CMOS Dual J-K
Master-Slave Flip-Flop
Features
Pinout
• High Voltage Type (20V Rating)
• Set - Reset Capability
CD4027BMS
TOP VIEW
• Static Flip-Flop Operation - Retains State Indefinitely
with Clock Level Either “High” or “Low”
• Medium Speed Operation - 16MHz (typ.) Clock Toggle
Rate at 10V
• Standardized Symmetrical Output Characteristics
• 100% Tested For Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full
Package-Temperature Range;
- 100nA at 18V and +25oC
Q2 1
Q2 2
CLOCK 2 3
RESET 2 4
K2 5
J2 6
SET 2 7
VSS 8
16 VDD
15 Q1
14 Q1
13 CLOCK 1
12 RESET 1
11 K1
10 J1
9 SET 1
• Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
• Registers, Counters, Control Circuits
Functional Diagram
SET 1
J1 10
K1 11
CLOCK1 13
RESET1 12
SET2 7
VDD
9 16
F/F1
15 Q1
14 Q1
Description
CD4027BMS is a single monolithic chip integrated circuit con-
taining two identical complementary-symmetry J-K master-
slave flip-flops. Each flip-flop has provisions for individual J, K,
Set Reset, and Clock input signals. Buffered Q and Q signals
are provided as outputs. This input-output arrangement pro-
vides for compatible operation with the Intersil CD4013B dual D
type flip-flop.
J2 6
K2 5
CLOCK2 3
RESET 2
F/F2
1 Q2
2 Q2
48
VSS
The CD4027BMS is useful in performing control, register, and
toggle functions. Logic levels present at the J and K inputs
along with internal self-steering control the state of each flip-
flop; changes in the flip-flop state are synchronous with the pos-
itive-going transition of the clock pulse. Set and reset functions
are independent of the clock and are initiated when a high level
signal is present at either the Set or Reset input.
The CD4027BMS is supplied in these 16-lead outline pack-
ages:
Braze Seal DIP H4T
Frit Seal DIP
H1E
Ceramic Flatpack H6W
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-780
File Number 3302
1 page  
Specifications CD4027BMS
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
N Threshold Voltage
N Threshold Voltage
Delta
P Threshold Voltage
P Threshold Voltage
Delta
Functional
Propagation Delay Time
SYMBOL
CONDITIONS
VNTH VDD = 10V, ISS = -10µA
∆VTN VDD = 10V, ISS = -10µA
VTP
∆VTP
VSS = 0V, IDD = 10µA
VSS = 0V, IDD = 10µA
F
TPHL
TPLH
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
VDD = 5V
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
NOTES
1, 4
1, 4
TEMPERATURE
+25oC
+25oC
MIN
-2.8
-
1, 4
+25oC
0.2
1, 4
+25oC
-
1
1, 2, 3, 4
+25oC
+25oC
VOH >
VDD/2
-
3. See Table 2 for +25oC limit.
4. Read and Record
MAX
-0.2
±1
2.8
±1
VOL <
VDD/2
1.35 x
+25oC
Limit
UNITS
V
V
V
V
V
ns
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC
PARAMETER
SYMBOL
DELTA LIMIT
Supply Current - MSI-1
Output Current (Sink)
Output Current (Source)
IDD
IOL5
IOH5A
± 0.2µA
± 20% x Pre-Test Reading
± 20% x Pre-Test Reading
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Initial Test (Pre Burn-In)
100% 5004
1, 7, 9
Interim Test 1 (Post Burn-In)
100% 5004
1, 7, 9
Interim Test 2 (Post Burn-In)
100% 5004
1, 7, 9
PDA (Note 1)
100% 5004
1, 7, 9, Deltas
Interim Test 3 (Post Burn-In)
100% 5004
1, 7, 9
PDA (Note 1)
100% 5004
1, 7, 9, Deltas
Final Test
100% 5004
2, 3, 8A, 8B, 10, 11
Group A
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Group D
Sample 5005
1, 2, 3, 8A, 8B, 9
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
READ AND RECORD
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
CONFORMANCE GROUPS
Group E Subgroup 2
TABLE 7. TOTAL DOSE IRRADIATION
MIL-STD-883
METHOD
TEST
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
READ AND RECORD
PRE-IRRAD
POST-IRRAD
1, 9 Table 4
7-784
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet CD4027BMS.PDF ] | |
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