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PDF FQA62N25C Data sheet ( Hoja de datos )

Número de pieza FQA62N25C
Descripción MOSFET ( Transistor )
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FQA62N25C Hoja de datos, Descripción, Manual

FQA62N25C
N-Channel QFET® MOSFET
250 V, 62 A, 35 mΩ
April 2014
Description
This N-Channel enhancement mode power MOSFET is
produced using Fairchild Semiconductor’s proprietary
planar stripe and DMOS technology. This advanced
MOSFET technology has been especially tailored to
reduce on-state resistance, and to provide superior
switching performance and high avalanche energy
strength. These devices are suitable for switched mode
power supplies, active power factor correction (PFC), and
electronic lamp ballasts.
Features
62 A, 250
ID = 31 A
V,
RDS(on)
=
35
m
(Max.)
@
VGS
=
10
V,
• Low Gate Charge (Typ. 100 nC)
• Low Crss (Typ. 63.5 pF)
• 100% Avalanche Tested
D
G
DS
TO-3PN
G
S
Absolute Maximum Ratings TC = 25oC unless otherwise noted.
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
PD Power Dissipation (TC = 25°C)
- Derate above 25°C
TJ, TSTG
TL
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case, Max.
Thermal Resistance, Case-to-Sink, Typ.
Thermal Resistance, Junction-to-Ambient, Max.
FQA62N25C
250
62
39
248
± 30
2300
62
29.8
5.5
298
2.38
-55 to +150
300
FQA62N25C
0.42
0.24
40
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Unit
°C/W
°C/W
°C/W
©2004 Fairchild Semiconductor Corporation
FQA62N25C Rev. C2
1
www.fairchildsemi.com

1 page




FQA62N25C pdf
Same Type
50KΩ as DUT
12V 200nF
300nF
VGS
10V
Qg
VGS
VDS
Qgs Qgd
IG = co3nmsAt.
DUT
Charge
Figure 12. Gate Charge Test Circuit & Waveform
V10GVS
VDS
VGS
RG
RL
VDD
DUT
VDS
90%
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
Figure 13. Resistive Switching Test Circuit & Waveforms
VDS
ID
RG
L
EAS = --21-- L IAS2
BVDSS
--------------------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
V1G0GVSS
tp
DUT
VDD VDS (t)
t p Time
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
©2004 Fairchild Semiconductor Corporation
FQA62N25C Rev. C2
5
www.fairchildsemi.com

5 Page










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