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CD4069UBMS fiches techniques PDF

Intersil Corporation - CMOS Hex Inverter

Numéro de référence CD4069UBMS
Description CMOS Hex Inverter
Fabricant Intersil Corporation 
Logo Intersil Corporation 





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CD4069UBMS fiche technique
CD4069UBMS
December 1992
CMOS Hex Inverter
Features
Pinout
• High Voltage Types (20V Rating)
• Standardized Symmetrical Output Characteristics
CD4069UBMS
TOP VIEW
• Medium Speed Operation: tPHL, tPLH = 30ns (typ) at
10V
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25oC
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
A1
G=A 2
B3
H=B 4
C5
I=C 6
VSS 7
14 VDD
13 F
12 L = F
11 E
10 K = E
9D
8 J=D
• Logic Inversion
• Pulse Shaping
• Oscillators
Functional Diagram
• High-Input-Impedance Amplifiers
1
A
2
G=A
Description
CD4069UBMS types consist of six CMOS inverter circuits.
These devices are intended for all general-purpose inverter
applications where the medium-power TTL-drive and logic-
level conversion capabilities of circuits such as the CD4009
and CD4049 Hex Inverter/Buffers are not required.
The CD4069UBMS is supplied in these 14 lead outline pack-
ages:
3
B
5
C
9
D
4
H=B
6
I=C
8
J=D
Braze Seal DIP H4H
Frit Seal DIP
H1B
Ceramic Flatpack H3W
11
E
VSS = 7
13
F
VDD = 14
10
K=E
12
L=F
Schematic Diagram
A
1(3, 5, 9, 11, 13)
VDD
VDD
G=A
G
2(4, 6, 8, 10, 12)
VSS
FIGURE 1. SCHEMATIC DIAGRAM OF 1 OF 6 IDENTICAL INVERTERS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-464
File Number 3321

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