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JCET - Dual Digital Transistors

Numéro de référence EMD10
Description Dual Digital Transistors
Fabricant JCET 
Logo JCET 





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EMD10 fiche technique
JC(T
JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD
Digital Transistors (Built-in Resistors)
EMD10 Dual Digital Transistors (NPN+PNP)
FEATURES
z Both the DTC123J chip and DTA123J chip in a package.
z Mounting possible with SOT-563 automatic mounting machines.
z Transistor elements are independent, eliminating interference.
z Mounting cost and area be cut in half.
SOT-563
Marking: D10
TR1 Absolute maximum ratings (Ta=25)
Parameter
Supply voltage
Input voltage
Output current
Power dissipation
Junction temperature
Storage temperature
Symbol
VCC
VIN
IO
IC(MAX)
Pd
Tj
Tstg
Limits
50
-5~12
100
100
150
150
-55~150
Unit
V
V
mA
mW
TR1 Electrical characteristics (Ta=25)
Parameter
Symbol Min.
Typ
Max.
Unit
Conditions
Input voltage
VI(off)
VI(on)
0.5
V
1.1
VCC=5V, IO=100μA
VO=0.3V, IO=5mA
Output voltage
VO(on)
0.1 0.3 V
IO/II=5mA/0.25mA
Input current
II
3.6 mA
VI=5V
Output current
IO(off)
0.5 μA
VCC=50V, VI=0
DC current gain
GI 80
VO=5V, IO=10mA
Input resistance
R1 1.54 2.2 2.86 K
-
Resistance ratio
R2/R1
17
21
26
-
Transition frequency
fT
250 MHz VCE=10V, IE=5mA, f=100MHz
www.cj-elec.com
1
DA,JMuany,2,2001145

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