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PDF MCM62996 Data sheet ( Hoja de datos )
| Número de pieza | MCM62996 | |
| Descripción | 16K x 16 Bit Asynchronous Fast Static RAM | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MCM62996 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MCM62996/D
16K x 16 Bit Asynchronous
Fast Static RAM
MCM62996
The MCM62996 is a 262,144 bit static random access memory organized as
16,384 words of 16 bits, fabricated using Motorola’s high–performance
silicon–gate CMOS technology. The device integrates a 16K x 16 SRAM core
with active high and active low chip enables, separate upper and lower byte write
strobes, and a fast output enable. This device has increased output drive
capability supported by multiple power pins. In addition, the output levels can be
either 3.3 V or 5 V TTL compatible by choice of the appropriate output bus power
supply.
Dual write strobes (BWL and BWH) are provided to allow individually writeable
bytes. BWL controls DQ0 – DQ7 (the lower bits), while BWH controls DQ8 –
DQ15 (the upper bits).
Additional power supply pins have been utilized and placed on the package for
maximum performance. In addition, the output buffer power pins are electrically
isolated from the other two and supply power only to the output buffers. This
allows connecting the output buffers to 3.3 V instead of 5.0 V if desired. If 3.3 V
output levels are chosen, the output buffer impedance in the “high” state is
approximately equal to the impedance in the “low” state thereby allowing
simplified transmission line terminations.
The MCM62996 will be available in a 52–pin plastic leaded chip carrier PLCC.
This device is ideally suited for systems that require wide data bus widths,
cache memory, and tag RAMs.
• Single 5 V ± 10% Power Supply
• Choice of 5 V or 3.3 V ± 10% Power Supplies for Output Buffers
• Fast Access Times: 12/15/20/25 ns Max
• Byte Writeable via Dual Write Strobes with Abort Write Capability
• Common Data Inputs and Data Outputs
• Output Enable Controlled Three State Outputs
• High Output Drive Capability: 85 pF/Output at Rated Access Time
• High Board Density 52–Lead PLCC Package
DQ8
DQ9
VCCQ
VSSQ
DQ10
DQ11
DQ12
DQ13
VSSQ
VCCQ
DQ14
DQ15
NC
FN PACKAGE
52–LEAD PLCC
CASE 778–02
PIN ASSIGNMENT
7 6 5 4 3 2 1 52 51 50 49 48 47
8 46
9 45
10 44
11 43
12 42
13 41
14 40
15 39
16 38
17 37
18 36
19 35
20 34
21 22 23 24 25 26 27 28 29 30 31 32 33
NC
DQ7
DQ6
VCCQ
VSSQ
DQ5
DQ4
DQ3
DQ2
VSSQ
VCCQ
DQ1
DQ0
BLOCK DIAGRAM
A0 – A13 14
E
E
MEMORY ARRAY
16K x 16
128 ROWS
128 COLUMNS
16
16
WRITE AMP
CONTROL
OUTPUT DQ0 – DQ15
BUFFER 16
W BWL BWH
G
PIN NAMES
A0 – A13 . . . . . . . . . . . . . . . . Address Inputs
W . . . . . . . . . . . . . . . . . . . . . . . . Write Enable
BWL . . . . . . . . . . . . . Byte Write Strobe Low
BWH . . . . . . . . . . . . Byte Write Strobe High
E . . . . . . . . . . . . . . . Active High Chip Enable
E . . . . . . . . . . . . . . . Active Low Chip Enable
G . . . . . . . . . . . . . . . . . . . . . . Output Enable
DQ0 – DQ15 . . . . . . . . . . Data Input/Output
VCC . . . . . . . . . . . . . . . . + 5 V Power Supply
VCCQ . . . . . . . Output Buffer Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . . . . Ground
VSSQ . . . . . . . . . . . . Output Buffer Ground
NC . . . . . . . . . . . . . . . . . . . . . No Connection
All power supply and ground pins must be
connected for proper operation of the device.
VCC ≥ VCCQ at all times including power up.
REV 3
5/95
M© OMoTtoOroRla,OInLc.A19F95AST SRAM
MCM62996
1
1 page  
A (ADDRESS)
E
(CHIP ENABLE)
W
(WRITE ENABLE)
BWx (BYTE
WRITE ENABLE)
DATA–IN
Q (DATA OUT)
tAVAV
tETWH
tWHAX
tBWxLWH
tDVWH
WRITE CYCLE
tAVWH
tAVWL
tWLWH
tEFAX
tAVET
tWLEF
tAVEF
tETEF
tWHBWxX
tBWxLEF
tEFBWxX
tWHDX
tWHQV
tWHQX
tDVEF
tEFDX
tWLQZ
MOTOROLA FAST SRAM
MCM62996
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet MCM62996.PDF ] | |
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