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PDF MCM101520 Data sheet ( Hoja de datos )

Número de pieza MCM101520
Descripción 4M x 1 Bit Fast Static Random Access Memory
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo



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No Preview Available ! MCM101520 Hoja de datos, Descripción, Manual

MOTOROLA
• SEMICONDUCTOR
TECHNICAL DATA
Product Preview
4M X 1 Bit Fast Static Random
Access Memory with ECl 1/0
The MCM 101520 is a 4,194,304 bit static random access memory organized as
4,194,304 words of 1 bit. This circuit is fabricated using high performance silicon-
gate BiCMOS technology. Asynchronous design eliminates the need for external
clocks or timing strobes. This device operates across a supply voltage range of
- 4.94 V to - 5.46 V. Inputs and outputs are voltage and temperature 100K ECL
compensated.
The MCM1 01520 meets JEDEC standards for functionality and revolutionary pin-
out. It is available in 400 mil, 36 lead surface mount TSOP package as well as 36
lead TAB.
FastAccesslim~L1EASE CONSULT
• Equal Address and Chip Select Access lime
S EFOR E• Power operationFAe~eA¥e
IRII...·.,.,.....,I
A17
A16
A15
A14
A13
ROW
MEMORY
MATRIX
A12
DECODER
1024 ROWS x
All 4096 COLUMNS
Al0
A9
AB
D
a
A21 A20 A19 AlB A7 AS A5 A4 A3 A2 Al AO
w - -......-I
MCM101520
~~Efl
400 MIL TSOP
CASETBD
TB PACKAGE
400 MIL TAB
CASETBD
PIN ASSIGNMENT
NC
Al0
All
A12
A13
A14
AB
S
VCC
VEE
D
W
AO
A15
A16
A17
AlB
NC
NC
Al
A2
A3
A19
A20
A21
NC
VEE
VCC
a
A9
A4
AS
AS
A7
NC
NC
PIN NAMES
AO - A2l ............. Address Inputs w.. .. .. .. ... .. .. .. .... Write Enable
S ....................... Chip Select D ........................ Data Input
Q ..................... Data Output NC ................... No Connection
VEE .................. Power Supply VCC ....................... Ground
This document contains information on a new product under development. Motorola reserves the right to change or discontinue this product without notice.
MOTOROLA FAST SRAM DATA
MCM101520
2·69

1 page




MCM101520 pdf
WRITE CYCLE 2 (8 Controlled, See Notes 1 and 2)
Symbol
MCM10152()"10 MCM10152()"12 MCM10152()"15
Parameter
Standard Alternate Min Max Min Max Min Max
Write Cycle Time
tAVAV hNc 10 -
12 -
15 -
Address Setup Time
tAVSL
tAS
1-
1-
1-
Address Valid to End of Write
tAVSH
tAW
7-
8-
9-
Write Pulse Width
tSLSH
lew
7-
8-
9-
tSLWH
Oata Valid to End of Write
tOVSH
tow
7-
8-
9-
Chip Select Set-Up Time
tSLWL
les
0-
0-
0-
Oata Hold Time
tSHOX
tOH
1-
1-
1-
Write Recovery Time
tSHAX
hNR
1-
1-
1-
NOTES:
1. A write occurs during the overlap of 8 low and IN low.
2. Product sensitivites to noise require proper grounding and decoupling of power supplies during read and write cycles.
3. All write cycle timings are referenced from the last valid address to the first transitioning address.
Unit Notes
ns 3
ns
ns
ns
ns
ns
ns
ns
WRITE CYCLE 2 (8 Controlled, See Notes 1 and 2)
~-----------------------~VAV----------------------~
~-----------------tAVSH----------------~·~1
A(ADDRESS)
ADDRESS VALID
S (CHIP SELECT)
14----~-tSHAX
- - - - - - - " " " " ~---------------tSLSH--------------~~ , . . - - - - - - - - -
~-------tDVSH-~.....~-
o(DATA IN)
DATA VALID
____tS_LW_L:-~~~.~I~~-------tSLWH--------------~)t~------------_____
W(WRITE ENABLE)
E
Q(DATAOUT)
_=r-------l~ rr LMotorola Mem_Orpy_refiX
ORDERING INFORMATION
(Order by Full Part Number)
Part Number
_
=Shipping Method (Blank Rails)
= = =Speed (10 10 ns, 12 12 ns, 15 15 ns)
Package (TS = TSOP, TB = TAB)
Full Part Numbers - MCM1 01520TS1 0
MCM101520TS12
MCM101520TS15
MCM101520TB10
MCM101520TB12
MCM101520TB15
MOTOROLA FAST SRAM DATA
MCM101520
2-73

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