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PDF MCM3264A Data sheet ( Hoja de datos )

Número de pieza MCM3264A
Descripción 64K x 32 Bit Static Random Access Memory Module
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo



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No Preview Available ! MCM3264A Hoja de datos, Descripción, Manual

MOTOROLA
• SEMICONDUCTOR
TECHNICAL DATA
64K X 32 Bit Static Random Access
Memory Module
The MCM3264A is a 2M bit static random access memory module organized as
65,536 words of 32 bits. The module is a 64-lead zig-zag in-line module consisting of
eight MCM6209C fast static RAMs packaged in a 28 J-Iead small outline package
(SOJ) and mounted on a printed circuit board along with a decoupling capacitor for
each FSRAM.
The MCM6209C is a high-performance CMOS fast static RAM organized as 65,536
words of 4 bits, fabricated using high-performance silicon-gate CMOS technology.
Static design eliminates the need for external clocks or timing strobes, while CMOS
circuitry reduces power consumption and provides for greater reliability.
The MCM3264A is equipped with output enable (<3) and four separate byte enable
(E1-E4) inputs, allowing for greater system flexibility. The G input, when high, will force
the outputs to high impedance. Ex high will do the same for byte x.
PDO and PD1 are reserved for density expansion. PDO is open and PD1 is con-
nected to ground internally on the module. These pins can be used to identify the
density of the memory module.
• Single 5 V ± 10% Power Supply
• Fast Access Time: 15/20 ns
• Equal Address and Chip Enable Access Time
• Three State Outputs
• Full TIL Compatible
• JEDEC Standard Compatible
• Power Operation: 1240/1160 mA Maximum, Active AC
• High Board Density ZIP Module
• Byte Operation: Four Separate Chip Enables, One for Each Byte (Eight Bits)
• High Quality Four Layer FR4 PWB with Separate Internal Power and Ground Plane
• Incorporates Motorola's State-of-the-Art Fast Static RAMs
PIN NAMES
AO-A15 ............. Address Inputs
W ..................... Write Enable
G ................... Output Enable
E1 - E4 . . . . . . . . . . . . . .. Byte Enables
000 - 0031 ... . . .. Data Input/Output
VCC ............. + 5 V Power Supply
VSS ........................ Ground
PD~ - POl ......... Package Density
NC .................. No Connection
All power supply and ground pins must
be connected for proper operation of the
device.
MCM3264A
PIN ASSIGNMENT
64-LEAD ZIG·ZAG IN·L1NE MODULE
TOP VIEW - 871 A
PD~ VSS
DOO PDl
DOl DOB
D02 D09
D03 DOlO
VCC DOll
Al AO
A2
A3
A5 A4
D04 D012
D05 D013
D06 D014
D07 D015
IN VSS
A7 A6
E1 E2
E3
NC
VSS
DQ16
DQ17
DQ18
DQ19
A9
All
A13
A14
DQ20
DQ2l
DQ22
DQ23
VSS
E4
NC
G
D024
D025
DQ26
D027
A8
Al0
A12
Vce
A15
DQ28
DQ29
D030
DQ3l
MOTOROLA FAST SRAM DATA
MCM3264A
5-29

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MCM3264A pdf
A (ADDRESS)
Q(DATAOUT)
READ CYCLE 1 (See Note)
____~ 'AVAV -----------~*'_
I::;REVIOUSO:~~AL-ID--~=~X' XXX~""----D-A!-AV-AU-D----
tAVQV-------~~'
NOTE: Device is continuously selected (E = VIL. G = VILl.
READ CYCLE 2 (See Notes)
_ _ _~ ~-----------tAVAV - - - - - - - - - - - - . l _ - - -
A(ADDRESS)
_ _ _ _-+-_ _ _""' 1"'t-----tELQV----~
EX (CHIP ENABLE)
G(OUTPUT ENABLE)
Q(DATAOUT)
fICC ---------IEUeeH ---
Vce
SUPPLY CURRENT ISB
DATAVAUD
NOTES:
1. Addresses valid prior to or coincident with E going low.
2. All read cycle timing is referenced from the last valid address to the first transitioning address.
MOTOROLA FAST SRAM DATA
MCM3264A
5-33

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