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PDF MCM44256 Data sheet ( Hoja de datos )

Número de pieza MCM44256
Descripción 4MB R4000 Secondary Cache Fast Static RAM Module Set
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo



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No Preview Available ! MCM44256 Hoja de datos, Descripción, Manual

MOTOROLA
• SEMICONDUCTOR
TECHNICAL DATA
4MB R4000 Secondary Cache
Fast Static RAM Module Set
Four MCM44256 modules comprise a full 4 MB of secondary cache for the
R4000 processor. Each module contains nine MCM6729WJ fast static RAMs for
a cache data size of 256K x 36. The tag portion, dependent on word line size,
contains either two MCM6729WJ or one MCM6726WJ fast static RAMs. All input
signals, except AO and WE are buffered using 74FBT2827 drivers with series
25 Q resistors.
The MCM6729WJ and MCM6726WJ are fabricated using high-performance
silicon-gate BiCMOS technology. Static design eliminates the need for internal
clocks or timing strobes.
All 4MB R4000 supported secondary cache options are available.
• Single 5 V ± 10% Power Supply
• All Inputs and Outputs are TTL Compatible
• Three State Outputs
• Fast Module Access Time: 12115/17 ns
• Zero Wait-State Operation
• Unified or Split Seconday Cache is Supported
• Word Line Sizes of 4, 8, 16, and 32 are Available (See Ordering Information
for Details)
• Decoupling Capacitors are Used for Each Fast Static RAM and Buffer, Along
with Bulk Capacitance for Maximum Noise Immunity
• High Quality Multi-Layer FR4 PWB with Separate Power and Ground Plane
PIN NAMES
AD-A17 ................ Address Inputs
WE ....................... Write Enable
DCS . . . . . . . . . . . . . . . . . . . . .. Data Enable
TCS ....................... Tag Enable
OE ..................... Output Enable
DOD - D035 . . . . . . . .. Data Input / Output
TDOD - TD07 ... TAG Data Input / Output
VCC ................ + 5 V Power Supply
VSS .......................... Ground
For proper operation of the device, VSS must
be connected to ground.
IMCM44256 Series I
PIN ASSIGNMENT
80 LEAD SIMM - TOP VIEW
Vee
001
003
005
VSS
008
0010
0012
0014
0015
0017
0019
0021
VSS
0023
0025
0027
0029
0030
0032
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
Vss
000
002
004
006
11 007
13 009
15 0011
17 0013
19 VSS
21 0016
23 0018
25 0020
27 0022
29 Vee
31 0024
33 0026
35 0028
37 VSS
39 0031
0034
VSS
AO
42
44
46
A2 48
A4 50
A6 52
Vee 54
5E 56
A8 58
Al0 60
VSS 62
A13 64
A15 66
A17 68
TOOO 70
TOOl 72
T003 74
T005 76
T007 78
Vss 80
41 0033
43 0035
45 WE
47 Al
49 A3
51 AS
53 VSS
55 oes
57 A7
59 A9
61 All
63 A12
65 A14
67 A16
69 Tes
71 Vss
73 T002
75 TOQ4
77 T006
79 Vee
MCM44256 SERIES
5-44
MOTOROLA FAST SRAM DATA

1 page




MCM44256 pdf
READ CYCLE 1 (See Note)
rAl-AI7 _~""'----_ _---JX,----_
IAVQV -----------~·I
.---t=:AD
--.,.~)C_______~~___~__I~AA~Q~IXA_o-x~_o-x_--_--_-:~I~ ~~~~~~~~~~~~~~,IAINOV _________
Q(DATAOUT)
PREVIOUS DATA VALID
DATA VALID
= =NOTE: Module is continuously selected (DeS or TeS VIL. OE VIU
READ CYCLE 2 (See Note)
tAl-AI7 -----
IAVQV
AD
I DCSfTCS
(DATAfTAG ENABLE)
t IADVQV
·1
.1
DE (OUTPUT ENABLE)
Q(DATAOUT)
NOTE: Address valid prior to or coincident with DeS or TeS going low.
X
>C
MCM44256 SERIES
5-48
MOTOROLA FAST SRAM DATA

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