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PDF TMPA901CMXBG Data sheet ( Hoja de datos )

Número de pieza TMPA901CMXBG
Descripción RISC 32-Bit Microprocessor
Fabricantes Toshiba 
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No Preview Available ! TMPA901CMXBG Hoja de datos, Descripción, Manual

TOSHIBA Original RISC 32-Bit Microprocessor
ARM Core Family
TMPA901CMXBG
Semiconductor Company

1 page




TMPA901CMXBG pdf
TMPA901CM
(10) USB Device controller: 1 channel
Supports high communication speed (480Mbps) (does not support Low Speed).
Supports 4 endpoints.
End-point 0: Control 64 bytes × 1- FIFO
End-point 1: Bulk (Device Host: IN transfer) 512 bytes × 2 -FIFO
End-point 2: Bulk (Host Device: OUT transfer) 512 bytes × 2- FIFO
End-point 3: Interrupt 64 bytes × 1- FIFO
(11) USB Host controller: 1 channel
Supports full communication speed (12Mbps) (does not support Low Speed)
(12) I2S (Inter-IC Sound) interface: 2 channel
Channel 0 (for reception: 32-byte FIFO × 2)
Channel 1 (for transmission: 32-byte FIFO × 2)
Channel 0 and channel1 have common usage pins.
(13) LCD controller
Supports 800 × 480 pixel size.
Supports TFT/STN panels.
For STN panels, 4/15/64 monochrome tones and 256/3375 color tones are supported.
For TFT panels, 16-bit color is supported.
(14) LCD data process accelerator
Scaling function (expansion/reduction)
Filtering function (bi-cubic convolution)
Image blending function (supports font blending)
(15) RTC (real-time clock)
(16) Melody/Alarm generator
Supports output of 8 alarm sound patterns.
(17) Key-on wake up (key-input interrupt )
(18) 10-bit AD converter (with a built-in sample-and-hold circuit): 4 channels
(19) Supports touch-screen interfaces
Since a low-resistance switch is built in to the product, external components for
horizontal/vertical switching can be deleted.
(20) Watchdog timer
(21) Oscillation Frequency Detector
Fail Safe mode for High frequency oscillation
(22) Interrupt function: 21 types
External 3types (7 pins): External Interrupt(edge: rise and fall, level: High and Low)
And Key In
Internal : 18 types : 16bit Timer × 3, RTC × 1, A/D converter × 1
LCDC × 1, NANDFC × 1, UART × 2, SSP × 1
I2C × 1, USB Device × 1, USB Host × 1, I2S × 1
LCDDA × 1, DMAC × 2, and WDT × 1
(23) I/O port: 43 pins
(24) DMA controller: 8 channels
TMPA901CM- 4
2010-07-29

5 Page





TMPA901CMXBG arduino
TMPA901CM
2.2 Pin Names and Functions
The names and functions of I/O pins are shown below.
Pins associated with memory are switched to either of two types of MPMC (MPMC0/1)
depending on the status of the external pin “SELMEMC”.
Table 2.2.1 Pin names and functions (1/6)
Pin name
SA0 to SA7
D0 to D7
SB0 to SB7
D8 to D15
SE0 to SE7
A0 to A7
SF0 to SF7
A8 to A15
SG0 to SG7
A16 to A23
SH2
SMCBE0n
SK5
SMCBE1n
SH3
SMCCS0n
SH4
SMCCS1n
SH7
DMCCSn
SJ0
SMCOEn
SJ1
DMCWEn
SJ2
DMCRASn
SJ3
DMCCASn
Number of pins
8
8
8
8
8
1
Input/Output
Input/Output
Input/Output
Output
Output
Output
Output
1 Output
1
Output
1
Output
1 Output
Output
1
Output
1 Output
Output
1 Output
Output
1 Output
Output
Function
Data: Data bus D0 to D7
Data: Data bus D8 to D15
Address: Address bus A0 to A7
Address: Address bus A8 to A15
Address: Address bus A16 to A23
Byte enable signal (D0 to D7) for
NORF/SRAM/MROM
Byte enable signal (D8 to D15) for
NORF/SRAM/MROM
Chip select signal 0 for NORF/SRAM/MROM
Chip select signal 1 for NORF/SRAM/MROM
Write-enable signal for SDR_SDRAM
Write-enable signal for DDR_SDRAM
Out-enable signal for NORF/SRAM/MROM
Write-enable signal for SDR_SDRAM
Write-enable signal for DDR_SDRAM
Row address strobe signal for SDR_SDRAM
Row address strobe signal for DDR_SDRAM
Column address strobe signal for SDR_SDRAM
Column address strobe signal for DDR_SDRAM
Remarks
For both MPMC0 and MPMC1
For both MPMC0 and MPMC1
For both MPMC0 and MPMC1
For both MPMC0 and MPMC1
For both MPMC0 and MPMC1
For both MPMC0 and MPMC1
For both MPMC0 and MPMC1
For both MPMC0 and MPMC1
For both MPMC0 and MPMC1
When using MPMC0
When using MPMC1
For both MPMC0 and MPMC1
When using MPMC0
When using MPMC1
When using MPMC0
When using MPMC1
When using MPMC0
When using MPMC1
Note: Pin names "SA0 through SA7, …, and SR0 through SR4” are symbols used for convenience and are different
from general-purpose port functions “PA0 through PA7, …, and PV0 through PV7."
TMPA901CM- 10
2010-07-29

11 Page







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