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PDF TMPM374FWUG Data sheet ( Hoja de datos )
| Número de pieza | TMPM374FWUG | |
| Descripción | 32 Bit RISC Microcontroller | |
| Fabricantes | Toshiba | |
| Logotipo |  |
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32 Bit RISC Microcontroller
TX03 Series
TMPM374FWUG
1 page  
TMPM374FWUG
Introduction: Notes on the description of SFR (Special Function Register) under this specification
An SFR (Special Function Register) is a control register for periperal circuits (IP).
The SFR addressses of IPs are described in the chapter on memory map, and the details of SFR are given in
the chapter of each IP.
Definition of SFR used in this specification is in accordance with the following rules.
a. SFR table of each IP as an example
・ SFR tables in each chapter of IP provides register names, addresses and brief descriptions.
・ All registers have a 32-bit unique address and the addresses of the registers are defined as follows,
with some exceptions: "Base address + (Unique) address"
Control register
Register name
SAMCR
Base Address = 0x0000_0000
Address(Base+)
0x0004
0x000C
Note: SAMCR register address is 32 bits wide from the address 0x0000_0004 (Base Address(0x00000000) +
unique address (0x0004)).
Note: The register shown above is an example for explanation purpose and not for demonstration purpose.
This register does not exist in this microcontroller.
b. SFR(register)
・ Each register basically consists of a 32-bit register (some exceptions).
・ The description of each register provides bits, bit symbols, types, initial values after reset and func-
tions.
5 Page 
6.6.2.4 SysTick Calibration Value Register
6.6.2.5 Interrupt Set-Enable Register 1
6.6.2.6 Interrupt Set-Enable Register 2
6.6.2.7 Interrupt Set-Enable Register 3
6.6.2.8 Interrupt Clear-Enable Register 1
6.6.2.9 Interrupt Clear-Enable Register 2
6.6.2.10 Interrupt Clear-Enable Register 3
6.6.2.11 Interrupt Set-Pending Register 1
6.6.2.12 Interrupt Set-Pending Register 2
6.6.2.13 Interrupt Set-Pending Register 3
6.6.2.14 Interrupt Clear-Pending Register 1
6.6.2.15 Interrupt Clear-Pending Register 2
6.6.2.16 Interrupt Clear-Pending Register 3
6.6.2.17 Interrupt Priority Register
6.6.2.18 Vector Table Offset Register
6.6.2.19 Application Interrupt and Reset Control Register
6.6.2.20 System Handler Priority Register
6.6.2.21 System Handler Control and State Register
6.6.3 Clock generator registers...................................................................................................................................................98
6.6.3.1 CGIMCGB (CG Interrupt Mode Control Register B)
6.6.3.2 CGIMCGD (CG Interrupt Mode Control Register D)
6.6.3.3 CGICRCG (CG Interrupt Request Clear Register)
6.6.3.4 CGNMIFLG (NMI Flag Register)
6.6.3.5 CGRSTFLG (Reset Flag Register)
7. Internal High-speed Oscillation Adjustment Function
7.1 Structure.................................................................................................................................107
7.2 Registers................................................................................................................................108
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
Register list...................................................................................................................................................................... 108
TRMOSCPRO (Protect register).....................................................................................................................................108
TRMOSCEN (Enable register).......................................................................................................................................109
TRMOSCINIT (Initial trimming value monitor register)..............................................................................................110
TRMOSCSET (Trimming value setting register)...........................................................................................................111
7.3 Operational Description.........................................................................................................112
7.3.1
7.3.2
7.3.3
Outline............................................................................................................................................................................. 112
Adjustment range.............................................................................................................................................................112
Internal Oscillation Frequency Measurement using TMRB...........................................................................................112
8. Input / Output Ports
8.1 Port Functions........................................................................................................................113
8.1.1 Function list.....................................................................................................................................................................113
8.1.2 Port Registers Outline.....................................................................................................................................................115
8.1.3 Port States in STOP Mode..............................................................................................................................................116
8.2 Port functions.........................................................................................................................117
8.2.1 Port A (PA4 to PA6).......................................................................................................................................................117
8.2.1.1 Port A Circuit Type
8.2.1.2 Port A register
8.2.1.3 PADATA (Port A data register)
8.2.1.4 PACR (Port A output control register)
8.2.1.5 PAFR1 (Port A function register 1)
8.2.1.6 PAFR2 (Port A function register 2)
8.2.1.7 PAOD (Port A open drain control register)
8.2.1.8 PAPUP (Port A pull-up control register)
8.2.1.9 PAPDN (Port A pull-down control register)
8.2.1.10 PAIE (Port A input control register)
8.2.2 Port B (PB3 to PB6)........................................................................................................................................................126
8.2.2.1
8.2.2.2
8.2.2.3
8.2.2.4
8.2.2.5
8.2.2.6
8.2.2.7
8.2.2.8
Port B Circuit Type
Port B register
PBDATA (Port B data register)
PBCR (Port B output control register)
PBFR1 (Port B function register 1)
PBOD (Port B open drain control register)
PBPUP (Port B pull-up control register)
PBPDN (Port B pull-down control register)
iii
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