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CDP68HC68A2 fiches techniques PDF

GE - CMOS Serial 10-Bit A/D Converter

Numéro de référence CDP68HC68A2
Description CMOS Serial 10-Bit A/D Converter
Fabricant GE 
Logo GE 





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CDP68HC68A2 fiche technique
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ CMOS Peripherals
Advance Information
CDP68HC68A2
OSC
TNT
M ISO
MOSI
SCK
CE
AIOI
EXT REF
VSS
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15
13
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TOP VIEW
VDD
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TERMINAL ASSIGNMENT
CMOS Serial10-Bit AID Converter
Features:
10-bit resolution
• a-bit mode for single data byte transfers
• SPI (Serial Peripheral Interface) compatible
• Operates ratiometrically referencing VDD or
an external source
14/ls 1O-bit conversion time
• a multiplexed analog input channels
• Independent channel select
• Three modes of operation
• On chip oscillator
• Low power CMOS circuitry
• Intrinsic sample and hold
• 16-lead dua/-in-line plastic
package
• 20-lead dual-in-line small-
outline plastic package
The CDP68HC68A2 is a CMOS 8- or 10-bit successive
approximation analog to digital converter (A/D) with a
standard RCA/Motorola Serial Peripheral Interface (SPI)
bus and eighi multiplexed analog inputs Voltage
referencing is obtained from either the VDD pin or an
external precision reference forthe sacrifice of one channel
when enabled. The operating range of the converter includes
the entire VD D to Vss voltage range for each of the eight
inputs.
The CDP68HC68A2 implements a switched capacitor,
successive approximation A/D conversion technique which
provides an inherent sample-and-hold function. An on-chip
Schmitt oscillator provides the internal timing of the A/D
converter It can be driven by an external oscillator or
system clock in the external mode, orcan be connected to a
single external capacitor to provide an independent clock in
the internal mode. The minimum 10-bit converSion time per
input is 14-microseconds/channel. Each conversion in the
1O-bit mode requires 14 oscillator clock pulses where 12 are
required in the 8-bit mode allowing a 12-mlcrosecond/-
channel conversion time
A unique feature of the CDP68HC68A2 allows any
combination of the eight input channels to be selected and
converted in ascending channel order in anyone of three
modes. The mode selection enables single, multiple or
continuous channel conversion operation. The device has
three READ/WRITE registers which are used to select the
mode of operation, input channels, and starting address.
The 1O-bit conversion data is stored (right justified) in two
8-bit bytes. The most significant byte contains two status
bits which may be monitored by the microcomputer. An
8-bit mode is available which performs a faster eight bit
CE 6
SPI
CONTROL LOGIC
CONTROL
LOGIC
ADDRESS
CONTROL
LOGIC
SUCCESSIVE
APPROXIMATION
CONTROL LOGIC
10-81T CAPACITOR ARRAY
STATUS CONTROL
REGISTERS REGISTERS
·USED AS VOLTAGE INPUT IN EXTERNAL
REFERENCE MODE
Fig. 1 - Block diagram of the CDP68HC68A2.
File Number 1963
________________________________________________________ 521

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